메뉴 건너뛰기




Volumn , Issue , 2005, Pages 2983-2986

An embedded processor based SOC test platform

Author keywords

[No Author keywords available]

Indexed keywords

AUTOMATIC TEST EQUIPMENT; BOUNDARY SCAN; EMBEDDED PROCESSORS; MIXED SIGNAL; MIXED-SIGNAL CORES; SCAN-BASED TESTING; SOC TESTS; TEST ACCESS MECHANISM; TEST COST; TEST PLATFORMS; TEST PROCEDURES; TEST PROGRAM;

EID: 34548228153     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2005.1465254     Document Type: Conference Paper
Times cited : (25)

References (12)
  • 1
    • 0032636437 scopus 로고    scopus 로고
    • Testing the monster chip
    • Jul
    • Y. Zorian, "Testing the monster chip," IEEE Spectrum, pages 54-60, Jul. 1999.
    • (1999) IEEE Spectrum , pp. 54-60
    • Zorian, Y.1
  • 3
    • 0006719687 scopus 로고    scopus 로고
    • An IEEE 1149.1 Based Test Access Architecture
    • ITC
    • L. Whetsel, "An IEEE 1149.1 Based Test Access Architecture," in Proc. of International Test Conference (ITC), pages 69-78, 1997.
    • (1997) Proc. of International Test Conference , pp. 69-78
    • Whetsel, L.1
  • 4
    • 0032310132 scopus 로고    scopus 로고
    • Hierarchical Test Access Architecture for Embedded Cores in an Integrated Circuit
    • D. Bhattacharya, "Hierarchical Test Access Architecture for Embedded Cores in an Integrated Circuit," in Proc. of VLSI Testing Symposium (VTS), pages 8-14, 1998.
    • (1998) Proc. of VLSI Testing Symposium (VTS) , pp. 8-14
    • Bhattacharya, D.1
  • 5
    • 0034482033 scopus 로고    scopus 로고
    • Considerations for Implementing IEEE1149.1 on System-on-a-Chip Integrated Circuits
    • Steven F. Oakland, "Considerations for Implementing IEEE1149.1 on System-on-a-Chip Integrated Circuits", IEEE International Test Conference, page 628-637, 2000.
    • (2000) IEEE International Test Conference , pp. 628-637
    • Oakland, S.F.1
  • 7
    • 0034497148 scopus 로고    scopus 로고
    • A Hierarchical Test Control Architecture for Core Based Design
    • K.-J Lee and C.-I. Huang, "A Hierarchical Test Control Architecture for Core Based Design," in Proc. of Asian Test Symposium, pages 248 -253, 2000.
    • (2000) Proc. of Asian Test Symposium , pp. 248-253
    • Lee, K.-J.1    Huang, C.-I.2
  • 9
  • 11
    • 84954444951 scopus 로고    scopus 로고
    • A sigma-delta modulation based BIST scheme for A/D converters
    • pages:, Nov
    • K.-J. Lee, S.-J. Chang and R.S. Tzeng , "A sigma-delta modulation based BIST scheme for A/D converters," Asian Test Symposium, pages:124 - 127, Nov. 2003.
    • (2003) Asian Test Symposium , pp. 124-127
    • Lee, K.-J.1    Chang, S.-J.2    Tzeng, R.S.3
  • 12
    • 84870965272 scopus 로고    scopus 로고
    • ARM Ltd
    • ARM Ltd. Web Site, http://www.arm.com/.
    • Web Site


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.