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Volumn , Issue , 2003, Pages

System-level modeling of dynamically reconfigurable hardware with SystemC

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; DISPENSERS; DISTRIBUTED COMPUTER SYSTEMS; DISTRIBUTED PARAMETER NETWORKS; ELECTRON BEAM LITHOGRAPHY; INTEGRATED CIRCUIT DESIGN; MICROPROCESSOR CHIPS; SYSTEM-ON-CHIP; SYSTEMS ANALYSIS;

EID: 34548168889     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPS.2003.1213321     Document Type: Conference Paper
Times cited : (35)

References (12)
  • 1
    • 0000227930 scopus 로고    scopus 로고
    • Reconfigurable Computing: A Survey of Systems and Software
    • June
    • Compton K., Hauck S., "Reconfigurable Computing: A Survey of Systems and Software", ACM Computing Surveys, June 2002, pp. 171-210.
    • (2002) ACM Computing Surveys , pp. 171-210
    • Compton, K.1    Hauck, S.2
  • 2
    • 0032668914 scopus 로고    scopus 로고
    • Reconfigurable computing: What, why, and implications for design automation
    • June
    • DeHon A., Wawrzynek J., "Reconfigurable Computing: What, Why, and Implications for Design Automation", Proceedings of 36th DAC, June 1999.
    • (1999) Proceedings of 36th DAC
    • DeHon, A.1    Wawrzynek, J.2
  • 4
    • 0034187952 scopus 로고    scopus 로고
    • MorphoSys: An integrated reconfigurable system for data-parallel and computation-intensive applications
    • May
    • Hartej S, et al. "MorphoSys: An integrated reconfigurable system for data-parallel and computation-intensive applications", IEEE transactions on computers. May 2000, pp. 465-481.
    • (2000) IEEE Transactions on Computers , pp. 465-481
    • Hartej, S.1
  • 5
    • 0035706050 scopus 로고    scopus 로고
    • A framework for reconfigurable computing: Task scheduling and context management
    • December
    • Maestre R., et al., "A framework for reconfigurable computing: Task scheduling and context management", IEEE Transactions on VLSI Systems, December 2001, pp. 858-873.
    • (2001) IEEE Transactions on VLSI Systems , pp. 858-873
    • Maestre, R.1
  • 6
    • 0033724033 scopus 로고    scopus 로고
    • A review of high-level synthesis for dynamically reconfigurable FPGAS
    • August
    • Zhang X., Ng K. W., "A review of high-level synthesis for dynamically reconfigurable FPGAS", Microprocessors and Microsystems, August 2000, pp. 199-211.
    • (2000) Microprocessors and Microsystems , pp. 199-211
    • Zhang, X.1    Ng, K.W.2
  • 7
    • 0033488494 scopus 로고    scopus 로고
    • Improving simulation accuracy in design methodologies for dynamically reconfigurable logic systems
    • Vasilko M., Cabanis D., "Improving Simulation Accuracy in Design Methodologies for Dynamically Reconfigurable Logic Systems", Proc. of FCCM, 1999, pp. 123-133.
    • (1999) Proc. of FCCM , pp. 123-133
    • Vasilko, M.1    Cabanis, D.2
  • 8
    • 77953086004 scopus 로고    scopus 로고
    • System-level modeling and implementation technique for run-time reconfigurable systems
    • April
    • Rissa T., Vasilko M., Niittylahti J., "System-Level Modeling and Implementation Technique for Run-Time Reconfigurable Systems", Proc. of FCCM, April 2002.
    • (2002) Proc. of FCCM
    • Rissa, T.1    Vasilko, M.2    Niittylahti, J.3
  • 9
    • 84947213008 scopus 로고    scopus 로고
    • http://www. coware. com/cowareN2C. html
  • 10
    • 84947215783 scopus 로고    scopus 로고
    • http://www. cadence. com/products/vcc. html
  • 11
    • 0034795611 scopus 로고    scopus 로고
    • SystemC-A modeling platform supporting multiple design abstractions
    • Panda P. R., "SystemC-A modeling platform supporting multiple design abstractions", Proceedings of the 14th ISSS, 2001 pp. 75-80.
    • (2001) Proceedings of the 14th ISSS , pp. 75-80
    • Panda, P.R.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.