Numerical simulation and modeling of static characteristics and electrical noise in submicron MOS transistors

Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Volumn 2, Issue , 2000, Pages 940-943

  Fadlallah, M ^a,b   Ghibaudo, G ^a   Jomaah, J ^a   Zoaeter, M ^b  

^a CNRS   (France)

^b LPM   (Lebanon)

Author keywords

[No Author keywords available]

Indexed keywords

ANALYTICAL MODELING; CARRIER NUMBERS; ELECTRIC NOISE; ELECTRICAL NOISE; MOS TRANSISTORS; NONUNIFORMITY; NUMERICAL SIMULATION; SEMI-ANALYTICAL; SHORT-CHANNEL EFFECT; STATIC CHARACTERISTIC; STRONG INVERSION; SUBMICRON;

COMPUTER SIMULATION; SPURIOUS SIGNAL NOISE; THRESHOLD VOLTAGE;

TRANSISTOR TRANSISTOR LOGIC CIRCUITS;

EID: 34547922691     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICECS.2000.913031     Document Type: Conference Paper

References (9)

1. K. Takeuchi, T. Tatsumi, A. Furukawa, "Channel Engineeringfor the reduction of random-Dopant-Placement-Induced Threshold Voltage Fluctuation", IEDM Tech. Dig. p 841, 1997.
2. T. Toyabe and S. Asai, "Analytical models of threshold voltage and breakdown voltage of short-channel MOSFET's derived from two dimensional analysis", IEEE j.Solid State Circuits, SC-14, p.375, 1979.
3. J. D.Kendall and A. R. Boothroyd, "A two-dimensional analytical threshold voltage model for MOSFET's with arbitrarily doped substrate", IEEE Electron device Lett., EDL-7, p. 407, 1986.
4. J. A. Greenfield and R. W. Dutton, "Nonplanar VLSI device analysis using the solution of poisson's equation", IEEE Trans Electron Dev, ED-27, p. 1520, 1980.
5. Y. A. El-Mansy and A. R. Boothroyd, "A simple two-dimensional model for IGFET in the saturation region", IEEE Trans Electron Devices, vol.ED-24, p. 254, 1977.
6. T. Skotnicki, G Merckel, T pedron, "The Voltage Doping Transformation: A New Approach to the Modeling of MOSFET Short Channel Effect's", IEEE EDL-9, p 109, 1988.
7. C. R. Viswanathan, B. C. Burkey, G. Lubberts, and T. J. Tredwell, "Threshold voltage in short-channel MOS devices", IEEE Trans Electron Dev., ED-32, p. 932, 1985.
8. Z.H. Liu, C. Hu, J-H. Huang, T-Y. Chan, M-C. Jeng, P.K. Ko, Y.C. Cheng, "Threshold Voltage Model for Deep-Submicrometer MOSFET's, " IEEE Trans. Electron Dev, ED-40, p. 86, 1993.
9. K.M. Cao, W. Liu, X. Jin, K. Vasanth, K. Green, J. Krick, T. Vrotsos, C. Hu, "Modeling of Pocket Implanted MOSFETs for Anomalous Analog Behavior, " IEDM Technical Digest, Washington, DC, p. 171, 1999