메뉴 건너뛰기




Volumn , Issue , 2006, Pages 317-320

An energy scalable computational array for sensor signal processing

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL ARRAY; DISTRIBUTED ARITHMETIC;

EID: 34547506802     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2006.320900     Document Type: Conference Paper
Times cited : (5)

References (12)
  • 4
    • 33646864552 scopus 로고    scopus 로고
    • K. Roy, S. Mukhopadhyay, and H. Mahmood-Meimand, Leakage current mechanisms and leakage reduction techniques in deepsubmicrometer cmos circuits, Proc. of the IEEE, 91, no. 2, pp. 305-27, Feburary 2003.
    • K. Roy, S. Mukhopadhyay, and H. Mahmood-Meimand, "Leakage current mechanisms and leakage reduction techniques in deepsubmicrometer cmos circuits," Proc. of the IEEE, vol. 91, no. 2, pp. 305-27, Feburary 2003.
  • 5
    • 39049137848 scopus 로고    scopus 로고
    • Memory design for energy scalable reconfigurable logic,
    • October, MS Thesis, ECE Dept, UC Davis
    • Bicky Bici Zhou, "Memory design for energy scalable reconfigurable logic," October 2004, MS Thesis, ECE Dept., UC Davis.
    • (2004)
    • Bici Zhou, B.1
  • 6
    • 0024700020 scopus 로고
    • Applications of distributed arithmetic to digital signal processing: A tutorial review
    • July
    • S. A. White, "Applications of distributed arithmetic to digital signal processing: A tutorial review," IEEE ASSP Magazine, pp. 4-19, July 1989.
    • (1989) IEEE ASSP Magazine , pp. 4-19
    • White, S.A.1
  • 7
    • 1242263410 scopus 로고    scopus 로고
    • A micropower programmable dsp using approximate signal processing based on distributed arithmetic
    • R. Amirtharajah and A. P. Chandrakasan, "A micropower programmable dsp using approximate signal processing based on distributed arithmetic," IEEE J. Solid State Circuits, vol. 39, no, 2, pp. 337-347, 2004.
    • (2004) IEEE J. Solid State Circuits , vol.39 , Issue.2 , pp. 337-347
    • Amirtharajah, R.1    Chandrakasan, A.P.2
  • 8
    • 0030107942 scopus 로고    scopus 로고
    • Low-power digital filtering: Using approximate, processing
    • March
    • J. T. Ludwig, S. H. nawab, and A. P. Chandrakasan, "Low-power digital filtering: using approximate, processing," IEEE J, Solid State Circuits, vol. 31, no. 3, pp. 395-9, March 1996.
    • (1996) IEEE J, Solid State Circuits , vol.31 , Issue.3 , pp. 395-399
    • Ludwig, J.T.1    nawab, S.H.2    Chandrakasan, A.P.3
  • 9
    • 39049097617 scopus 로고    scopus 로고
    • Energy scalable distributed arithmetic on a field programmable gate array and a Standard-Cell core,
    • June, MS Thesis, ECE Dept, UC Davis
    • Zulfiqar Ali Ansari, "Energy scalable distributed arithmetic on a field programmable gate array and a Standard-Cell core," June 2005, MS Thesis, ECE Dept., UC Davis.
    • (2005)
    • Ali Ansari, Z.1
  • 10
    • 39049103308 scopus 로고    scopus 로고
    • V. George, H. Zhang, and J. Rabaey, The design of a low energy fpga, in International Symposium on Low-Power Design (ISLPED), 1999, ACM Press, pp., 188-93.
    • V. George, H. Zhang, and J. Rabaey, "The design of a low energy fpga," in International Symposium on Low-Power Design (ISLPED), 1999, vol. ACM Press, pp., 188-93.
  • 11
    • 84957870821 scopus 로고    scopus 로고
    • Vpr: A new packing, placement and routing toll for fpga research
    • V. Betz and J. Rose, "Vpr: A new packing, placement and routing toll for fpga research," in Proceedings of FPL'97, 1997, pp. 213-22.
    • (1997) Proceedings of FPL'97 , pp. 213-222
    • Betz, V.1    Rose, J.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.