Low-power approaches to high-speed current-steering digital-to-analog converters in 0.18-μm CMOS

IEEE Journal of Solid-State Circuits

Volumn 42, Issue 8, 2007, Pages 1688-1698

  Mercer, Douglas A ^a,b  

^a IEEE   (United States)

^b ANALOG DEVICES INC   (United States)

Author keywords

Calibration; CMOS; Digital to analog converter (DAC); High linearity; High speed; Low power; Self calibration

Indexed keywords

DIGITAL TO ANALOG CONVERTERS (DAC); HIGH LINEARITY; OUTPUT FREQUENCY; SELF CALIBRATION;

CALIBRATION; CMOS INTEGRATED CIRCUITS; ENERGY DISSIPATION;

DIGITAL TO ANALOG CONVERSION;

EID: 34547440206     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2007.900279     Document Type: Conference Paper

References (16)

1. D. Mercer and L. Singer, "12-b 125 MSPS CMOS D/A designed for spectral performance," in Proc. IEEE Int. Symp. Low Power Electronics and Design (ISLPED), 1996, pp. 243-246.
2. W. Schofield, D. Mercer, and L. St. Onge, "A 16 b 400 MS/s DAC with. < -80 dBc IMD to 300 MHz and < -160 dBm/Hz noise power spectral density," in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, 2003, pp. 126-127.
3. B. Schafferer and R. Adams, "A 3V CMOS 400mW 14b 1.4GS/s DAC for multi-carrier applications," in IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, 2004, p. 360.
4. 2 CMOS DAC," IEEE J. Solid-State Circuits, vol. 36, no. 7, pp. 1144-1147, Jul. 2001.
5. J. Deveugele and M. Steyaert, "A 10 b 250 MS/s binary-weighted current-steering DAC," IEEE J. Solid-State Circuits, vol. 41, no. 2, pp. 320-329, Feb. 2006.
6. A. Van den. Bosch, M. Steyaert, and W. Sansen, "SFDR-bandwidth limitations for high-speed high-resolution current-steering CMOS D/A converters," in Proc. IEEE Int. Conf. Electronics, Circuits and Systems, 1999, pp. 1193-1196.
7. AD9754 Data Sheet. Analog Devices.
8. D. Mercer, "A study of error sources in current steering digital-to-analog converters," in Proc. IEEE Custom Integrated Circuits Conf. (CICC), 2004, pp. 185-190.
9. D. Mercer, "A low power current steering digital to analog converter in 0.18 micron CMOS," in Proc. IEEE Int. Symp. Low Power Electronics and Design (ISLPED), 2005, pp. 72-77.
10. D. Mercer, "Latch, with data jitter free clock load," U.S. Patent 7,023,255, Apr. 4, 2006.
11. AD9744 Data Sheet. Analog Devices.
12. D. Mercer, "A 16 b D/A converter with, increased spurious free dynamic range," IEEE, J. Solid-State Circuits, vol. 29, no. 10, pp. 1180-1185, Oct. 1994.
13. D. Mercer and W. Schofield, "Calibrated current source," U.S. Patent 6,583,740, Jun. 24, 2003.
14. Y. Cong and R. Geiger, "A 1.5 V 14-bit 100 MSPS self-calibrated DAC," IEEE J. Solid-State Circuits, vol. 38, no. 12, pp. 2051-2060, Dec. 2003.
15. D. Mercer and W. Schofield, "Current DAC code independent switching," U.S. Patent 6,768,438, Jul. 27, 2004.
16. D. Mercer, D. Reynolds, D. Robertson, and E. Stroud, "Skewless differential switch and DAC employing the same," U.S. Patent 5,689,257, Nov. 18, 1997.