NBTI-aware synthesis of digital circuits

Proceedings - Design Automation Conference

Volumn , Issue , 2007, Pages 370-375

  Kumar, Sanjay V ^a   Kim, Chris H ^a   Sapatnekar, Sachin S ^a  

^a UNIVERSITY OF MINNESOTA   (United States)

Author keywords

Area; Delay; Negative Bias Temperature Instability (NBTI); Signal probability; Technology mapping

Indexed keywords

NEGATIVE BIAS TEMPERATURE INSTABILITY (NBTI); SIGNAL PROBABILITY; TECHNOLOGY MAPPING;

BENCHMARKING; LOGIC GATES; MOS DEVICES; NANOTECHNOLOGY; THERMODYNAMIC STABILITY; THRESHOLD VOLTAGE; TRANSISTORS;

DIGITAL CIRCUITS;

EID: 34547358150     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DAC.2007.375189     Document Type: Conference Paper

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