-
1
-
-
0001452266
-
ARCHGEN: Automated Synthesis of Analog Systems
-
June
-
B.A.A. Antao, A.J. Brodersen, "ARCHGEN: Automated Synthesis of Analog Systems", IEEE Trans. VLSI 3(2), June 1995, pp. 231-244
-
(1995)
IEEE Trans. VLSI
, vol.3
, Issue.2
, pp. 231-244
-
-
Antao, B.A.A.1
Brodersen, A.J.2
-
2
-
-
0024133185
-
Analog Compilation Based on Successive Decompositions
-
E. Berkcan et al, "Analog Compilation Based on Successive Decompositions," Proc. DAC, 1988, pp. 369-375
-
(1988)
Proc. DAC
, pp. 369-375
-
-
Berkcan, E.1
-
3
-
-
17644421827
-
A Synthesis System for Analog Circuits Based on Evolutionary Search and Topological Reuse
-
April
-
T.R. Dastidar et al, "A Synthesis System for Analog Circuits Based on Evolutionary Search and Topological Reuse," IEEE Trans. Ev. Comp. 9(2), April 2005, pp. 211-224
-
(2005)
IEEE Trans. Ev. Comp
, vol.9
, Issue.2
, pp. 211-224
-
-
Dastidar, T.R.1
-
4
-
-
0037318922
-
WATSON: Design Space Boundary Exploration and Model Generation for Analog and RFIC Design
-
B. De Smedt and G. Gielen, "WATSON: Design Space Boundary Exploration and Model Generation for Analog and RFIC Design," IEEE Trans. CAD 22(2), 2003, pp. 213-224
-
(2003)
IEEE Trans. CAD
, vol.22
, Issue.2
, pp. 213-224
-
-
De Smedt, B.1
Gielen, G.2
-
5
-
-
0036530772
-
A Fast and Elitist Multi-Objective Genetic Algorithm: NSGA-II
-
K. Deb et al., "A Fast and Elitist Multi-Objective Genetic Algorithm: NSGA-II," IEEE Trans. Ev. Comp. 6(2), 2002
-
(2002)
IEEE Trans. Ev. Comp
, vol.6
, Issue.2
-
-
Deb, K.1
-
6
-
-
39049131196
-
Implications of Proximity Effects for Analog Design
-
P. Drennan et al., "Implications of Proximity Effects for Analog Design", Proc. CICC, 2006
-
(2006)
Proc. CICC
-
-
Drennan, P.1
-
7
-
-
34548331662
-
An Efficient Methodology for Hierarchical Synthesis of Mixed-Signal Systems with Fully Integrated Building Block Topology Selection
-
T. Eeckelaert et al, "An Efficient Methodology for Hierarchical Synthesis of Mixed-Signal Systems with Fully Integrated Building Block Topology Selection," Proc. DATE, 2007
-
(2007)
Proc. DATE
-
-
Eeckelaert, T.1
-
8
-
-
0022606514
-
BLADES: An Expert System For Analog Circuit Design
-
F.M. El-Turky, R.A. Nordin, "BLADES: An Expert System For Analog Circuit Design," Proc. ISCAS, 1986, pp.552- 555
-
(1986)
Proc. ISCAS
, pp. 552-555
-
-
El-Turky, F.M.1
Nordin, R.A.2
-
9
-
-
0024908745
-
OASYS: A Framework for Analog Circuit Synthesis
-
R. Harjani et al., "OASYS: A Framework for Analog Circuit Synthesis," IEEE Trans. CAD 8(12), pp. 1247-1266, 1992
-
(1992)
IEEE Trans. CAD
, vol.8
, Issue.12
, pp. 1247-1266
-
-
Harjani, R.1
-
10
-
-
33750240485
-
ALPS: The Age-Layered Population Structure for Reducing the Problem of Premature Convergence
-
GECCO
-
G.S. Hornby, "ALPS: The Age-Layered Population Structure for Reducing the Problem of Premature Convergence," Proc. Genetic and Ev. Comp. Conf. (GECCO), 2006, pp. 815-822
-
(2006)
Proc. Genetic and Ev. Comp. Conf
, pp. 815-822
-
-
Hornby, G.S.1
-
11
-
-
0025383839
-
OPASYN: A Compiler for CMOS Operational Amplifiers
-
Feb
-
H.Y. Koh et al, "OPASYN: A Compiler for CMOS Operational Amplifiers," IEEE Trans. CAD vol. 9, Feb 1990
-
(1990)
IEEE Trans. CAD
, vol.9
-
-
Koh, H.Y.1
-
13
-
-
0029213547
-
-
W. Kruiskamp and D. Leenaerts, DARWIN: CMOS Opamp Synthesis by Means of a Genetic Algorithm, DAC, 1995
-
W. Kruiskamp and D. Leenaerts, "DARWIN: CMOS Opamp Synthesis by Means of a Genetic Algorithm", DAC, 1995
-
-
-
-
14
-
-
0029287787
-
Integer Programming Based Topology Selection of Cell Level Analog Circuits
-
April
-
P.C. Maulik et al., "Integer Programming Based Topology Selection of Cell Level Analog Circuits", IEEE Trans. CAD 14(4), April 1995
-
(1995)
IEEE Trans. CAD
, vol.14
, Issue.4
-
-
Maulik, P.C.1
-
15
-
-
46149106988
-
Genetic Programming in Industrial Analog CAD: Applications and Challenges
-
III, Riolo et al, eds, Springer, ch. 19
-
T. McConaghy and G. Gielen, "Genetic Programming in Industrial Analog CAD: Applications and Challenges", Genetic Programming Theory and Practice III, Riolo et al, eds, Springer, 2005, ch. 19
-
(2005)
Genetic Programming Theory and Practice
-
-
McConaghy, T.1
Gielen, G.2
-
16
-
-
0026405818
-
SEAS: A Simulated Evolution Approach for Analog Circuit Synthesis
-
Z. Ning et al, "SEAS: A Simulated Evolution Approach for Analog Circuit Synthesis," Proc. CICC, 1991
-
(1991)
Proc. CICC
-
-
Ning, Z.1
-
17
-
-
34547325997
-
-
B. Razavi, Design of Analog CMOS Integrated Circuits. McGraw-Hill, 2000
-
B. Razavi, Design of Analog CMOS Integrated Circuits. McGraw-Hill, 2000
-
-
-
-
18
-
-
27944489940
-
-
R.A. Rutenbar, G.E. Gielen, and B.A. Antao, eds, IEEE Press, Piscataway
-
R.A. Rutenbar, G.E. Gielen, and B.A. Antao, eds., Computer-Aided Design of Analog Integrated Circuits and Systems, IEEE Press, Piscataway, 2002
-
(2002)
Computer-Aided Design of Analog Integrated Circuits and Systems
-
-
-
19
-
-
26844465377
-
-
A.H. Shah et al, High-Performance CMOS-Amplifier Design Uses Front-To-Back Analog Flow, EDN, Oct, 2002
-
A.H. Shah et al, "High-Performance CMOS-Amplifier Design Uses Front-To-Back Analog Flow," EDN, Oct, 2002
-
-
-
-
20
-
-
0036864589
-
The Invention of CMOS Amplifiers Using Genetic Programming and Current-Flow Analysis
-
T. Sripramong and C. Toumazou, "The Invention of CMOS Amplifiers Using Genetic Programming and Current-Flow Analysis," IEEE Trans. CAD 21(11), 2002, pp. 1237-1252
-
(2002)
IEEE Trans. CAD
, vol.21
, Issue.11
, pp. 1237-1252
-
-
Sripramong, T.1
Toumazou, C.2
-
21
-
-
0026397049
-
HECTOR: A Hierarchical Topology-Construction Program for Analog Circuits Based on a Declarative Approach to Circuit Modeling
-
K. Swings et al, "HECTOR: a Hierarchical Topology-Construction Program for Analog Circuits Based on a Declarative Approach to Circuit Modeling," CICC, 1991
-
(1991)
CICC
-
-
Swings, K.1
-
22
-
-
34547327558
-
Generation of Yield-Aware Pareto Surfaces for Hierarchical Circuit Design Space Exploration
-
S. Tiwary et al, "Generation of Yield-Aware Pareto Surfaces for Hierarchical Circuit Design Space Exploration," Proc. DAC, 2006, pp. 31-56
-
(2006)
Proc. DAC
, pp. 31-56
-
-
Tiwary, S.1
-
23
-
-
0025591407
-
ISAID - A Methodology for Automated Analog IC Design
-
C. Toumazou et al, "ISAID - A Methodology for Automated Analog IC Design," Proc. ISCAS, vol. 1, 1990, pp. 531-555.
-
(1990)
Proc. ISCAS
, vol.1
, pp. 531-555
-
-
Toumazou, C.1
|