A 14-bit 130-MHZ CMOS current-steering DAC with adjustable INL

ESSCIRC 2004 - Proceedings of the 30th European Solid-State Circuits Conference

Volumn , Issue , 2004, Pages 167-170

  Chen, Tao ^a   Geens, Peter ^a   Van Plas, Geert Der ^a   Dehaene, Wim ^a   Gielen, Georges ^a  

^a UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DECODING; GATES (TRANSISTOR); MICROPROCESSOR CHIPS; NATURAL FREQUENCIES; OPTIMIZATION; RANDOM ACCESS STORAGE; SIGNAL PROCESSING; SYNCHRONIZATION; TELECOMMUNICATION SYSTEMS; THERMOMETERS; THRESHOLD VOLTAGE;

CURRENT CELLS; CURRENT SOURCES; SIGNAL FREQUENCY; SIGNAL LINES; SPURIOUS-FREE DYNAMIC RANGE (SFDR);

DIGITAL TO ANALOG CONVERSION;

EID: 17644411494     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)

1. 2 random walk CMOS DAC. IEEE J. Solid-State Circuits, 34(12): 1708-1718, 1999.
2. A. R. Bugeja and B. Song. A self-trimming 14-b 100-MS/s CMOS DAC. IEEE J. Solid-State Circuits, 35(12): 1841-1852, 2000.
3. 2 CMOS DAC. IEEE J. Solid-State Circuits, 36(7): 1144-1147, 2001.
4. Q. Huang, P. A. Francese, C. Martelli, and J. Nielsen. A 200MS/s 14b 97mW DAC in 0.18 μm CMOS. Proc. of the IEEE International Solid-State Circuits Conference, pages 364-365, 2004.
5. T. Chen and G. Gielen. Analysis of the dynamic SFDR property of high-accuracy current-steering D/A converters. Proc. of the 2003 International Symposium on Circuits and Systems, pages I-973-I-976, 2003.
6. Y. Cong and R. Geiger. Formulation of INL and DNL yield estimation in current-steering D/A converters. Proc. of the 2002 International Symposium on Circuits and Systems, 2002.
7. M. Pelgrom, A. Duinmaijer, and A. Welbers. Matching properties of MOS transistors. IEEE J. Solid-State Circuits, 24(10): 1433-1439, 1989.
8. S. Luschas and H. S. Lee. Output impedance requirements for DACs. Proc. of the 2003 International Symposium on Circuits and Systems, pages I-861-I-864, 2003.
9. A. Van den Bosch, M. Borremans, M. Steyaert, and W. Sansen. Solving static and dynamic performance limitations for high speed D/A converters. Proc. of the 10th Workshop on Advances in Analog Circuit Design, 2001.