Advanced 'Fs/2' discrete-time GSM receiver in 90-nm CMOS

2006 IEEE Asian Solid-State Circuits Conference, ASSCC 2006

Volumn , Issue , 2006, Pages 371-374

  Joet, Loïc ^a   Dezzani, Alessandro ^a   Montaudon, Franck ^a   Badets, Franck ^a   Sibille, Florent ^a   Corre, Christian ^a   Chabert, Laurent ^a   Mina, Rayan ^a   Bailleuil, Frédéric ^a   Saias, Daniel ^a   Paillardet, Frédéric ^a   Perea, Ernesto ^a  

^a STMICROELECTRONICS   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; GLOBAL SYSTEM FOR MOBILE COMMUNICATIONS; LOW NOISE AMPLIFIERS; SENSITIVITY ANALYSIS; SIGNAL RECEIVERS; SPURIOUS SIGNAL NOISE;

ANALOG TO DIGITAL CONVERTERS; BASEBAND SIGNALS; DISCRETE-TIME RECEIVERS;

CMOS INTEGRATED CIRCUITS;

EID: 34250859570     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASSCC.2006.357928     Document Type: Conference Paper

References (4)

1. R. Bagheri et al.., "An 800 MHz to 5 GHz Software-Defined Radio Receiver in 90 nm CMOS", ISSCC Dig. Of Tech. Papers, pp. 480-481, Feb. 2006
2. D. Jakonis et al., "A 2.4 GHz RF sampling Receiver Front End in 0.18 um CMOS," IEEE J. of Solid-State Circuits, vol40, no 6, pp. 1265-1277, June. 2005
3. R. B. Staszewski et al., "All Digital TX Frequency Synthesizer and Discrete-time Receiver for Bluetooth Radio in 130-nm CMOS," IEEE J. of Solid-State Circuits, vol39, no12, pp. 2278-2291, Dec. 2004
4. A. Dezzani, E. Andre., "A 1.2V Dual-Mode WCDMA/GPRS Sigma Delta Modulator," ISSCC Dig. Of Tech. Papers, Feb. 2003