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Volumn 1, Issue 4, 2007, Pages 925-932

A dual-loop scheme for fault-tolerance and early fault detection

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; CONTROL SYSTEM ANALYSIS; FAULT DETECTION;

EID: 34250813134     PISSN: 17518644     EISSN: 17518652     Source Type: Journal    
DOI: 10.1049/iet-cta:20060274     Document Type: Article
Times cited : (8)

References (17)
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    • 2004, Ph.D, Simon Fraser University
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    • Zhou, K.1    Campos-Delgado, D.U.2
  • 10
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    • Integrated design of reconfigurable fault-tolerant control systems
    • Zhang, Y., and Jiang, J.: ' Integrated design of reconfigurable fault-tolerant control systems ', AIAA J. Guid., Control, Dyn., 2000, 24, (1), p. 133-136
    • (2000) AIAA J. Guid., Control, Dyn. , vol.24 , Issue.1 , pp. 133-136
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.