A self-calibrate all-digital 3Gbps SATA driver design

2005 IEEE Asian Solid-State Circuits Conference, ASSCC 2005

Volumn , Issue , 2005, Pages 57-60

  Wang, Hsin Wen ^a   Lu, Hung Wen ^b   Su, Chau Chin ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^b NATIONAL CENTRAL UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; NOISE ABATEMENT; POWER SUPPLY CIRCUITS; SWITCHING; TRANSCEIVERS;

3GBPS SATA; LOW VOLTAGE DIFFERENTIAL SIGNAL (LVDS); TSMC;

DIGITAL CIRCUITS;

EID: 34250785606     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASSCC.2005.251806     Document Type: Conference Paper

References (5)

1. I. Novak, "Reducing simultaneous switching noise and EMI on ground/power planes by dissipative edge termination," Advanced Packaging, IEEE Transactions on, Vol.22, Iss.3, Aug 1999, pp.274-283.
2. IEEE Standard for Low-Voltage Differential Signals (LVDS) for Scalable Coherent Interface (SCI), IEEE Std 1596.3-1996, 31 Jul 1996
3. http://www.serialata.org/
4. E. Alon, V. Stojanovic, M.A. Horowitz, "Circuits and techniques for high-resolution measurement of on-chip power supply noise," Solid-State Circuits, IEEE Journal of, Vol.40, Iss.4, April 2005, pp.820-828
5. B. Razavi, "Prospects of CMOS technology for high-speed optical communication circuits," Solid-State Circuits, IEEE Journal of, Vol.37, Iss.9, Sep 2002, pp.1135-1145