Global High-Speed Signaling in Nanometer CMOS

2005 IEEE Asian Solid-State Circuits Conference, ASSCC 2005

Volumn , Issue , 2005, Pages 393-396

  Joshua, Jaeyoung Kang ^a   Jun, Young Park ^a   Flynn, Michael P ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; DIGITAL SIGNAL PROCESSING; ELECTRIC LINES; MICROPROCESSOR CHIPS; SIGNAL INTERFERENCE; STANDARDS;

DIGITAL SIGNALING; EQUALIZATION; EYE DIAGRAMS; METAL PROCESSING;

CMOS INTEGRATED CIRCUITS;

EID: 34250694094     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASSCC.2005.251748     Document Type: Conference Paper

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