An ILP based hierarchical global routing approach for VLSI ASIC design

Optimization Letters

Volumn 1, Issue 3, 2007, Pages 281-297

  Yang, Zhen ^a   Vannelli, Anthony ^a   Areibi, Shawki ^b  

^a UNIVERSITY OF WATERLOO   (Canada)

^b UNIVERSITY OF GUELPH   (Canada)

Author keywords

Integer linear programming; Standard cell global routing; VLSI physical design

Indexed keywords

CONSUMER ELECTRONICS; HIERARCHICAL SYSTEMS; INTEGER PROGRAMMING; LINEAR PROGRAMMING; LOGIC GATES; TELECOMMUNICATION SYSTEMS; VLSI CIRCUITS;

INTEGER LINEAR PROGRAMMING; STANDARD CELL GLOBAL ROUTING; VLSI PHYSICAL DESIGN;

APPLICATION SPECIFIC INTEGRATED CIRCUITS;

EID: 34249080323     PISSN: 18624472     EISSN: 18624480     Source Type: Journal    
DOI: 10.1007/s11590-006-0027-0     Document Type: Article

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