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Volumn 54, Issue 5, 2007, Pages 392-396

A First-Order Tree-Structured DAC with Reduced Signal-Band Noise

Author keywords

Dither mismatch shaping sigma delta ( )modulator; tree structured digital to analog converter (DAC)

Indexed keywords

CODES (SYMBOLS); COMPUTER SIMULATION; DELTA SIGMA MODULATION; ELECTRIC DISTORTION; SEQUENTIAL SWITCHING; SIGNAL TO NOISE RATIO;

EID: 34248641725     PISSN: 15497747     EISSN: 15583791     Source Type: Journal    
DOI: 10.1109/TCSII.2007.892397     Document Type: Article
Times cited : (13)

References (9)
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  • 3
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    • R. T. Baird and T. S. Fiez, “Linearity enhancement of multibit ∑Δ A/D and D/A converters using data weighted averaging,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 42, no. 12, pp. 753–762, Dec. 1995.
    • (1995) IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process. , vol.42 , Issue.12 , pp. 753-762
    • Baird, R.T.1    Fiez, T.S.2
  • 4
    • 4344703512 scopus 로고    scopus 로고
    • Use of dynamic element matching in a multi-path sigma-delta modulator
    • May
    • V. Ferragina, “Use of dynamic element matching in a multi-path sigma-delta modulator,” in Proc. IEEE Int. Symp. Circuits Syst., May 2004, pp. 649–652.
    • (2004) Proc. IEEE Int. Symp. Circuits Syst. , pp. 649-652
    • Ferragina, V.1
  • 5
    • 0031257247 scopus 로고    scopus 로고
    • Spectral shaping of circuit errors in digital-to-analog converters
    • Oct.
    • I. Galton, “Spectral shaping of circuit errors in digital-to-analog converters,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 44, no. 10, pp. 808–817, Oct. 1997.
    • (1997) IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process. , vol.44 , Issue.10 , pp. 808-817
    • Galton, I.1
  • 6
    • 0035521217 scopus 로고    scopus 로고
    • Simplified logic for first order and second order mismatch-shaping digital-to-analog converters
    • Nov.
    • J. Welz and I. Galton, “Simplified logic for first order and second order mismatch-shaping digital-to-analog converters,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 48, no. 11, pp. 1014–1026, Nov. 2001.
    • (2001) IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process. , vol.48 , Issue.11 , pp. 1014-1026
    • Welz, J.1    Galton, I.2
  • 7
    • 0033886802 scopus 로고    scopus 로고
    • A 3.3-V single-poly CMOS audio ADC delta-sigma modulator with 98-dB peak SINAD and 105-dB peak SFDR
    • Mar.
    • E. Foglemen, I. Galton, W. Huff, and H. Jensen, “A 3.3-V single-poly CMOS audio ADC delta-sigma modulator with 98-dB peak SINAD and 105-dB peak SFDR,” IEEE J. Solid-State Circuits, vol. 35, no. 3, pp. 297–307, Mar. 2000.
    • (2000) IEEE J. Solid-State Circuits , vol.35 , Issue.3 , pp. 297-307
    • Foglemen, E.1    Galton, I.2    Huff, W.3    Jensen, H.4
  • 8
    • 0035275406 scopus 로고    scopus 로고
    • An audio ADC delta-sigma modulator with 100-dB peak SINAD and 102-dB DR using a second-order mismatch-shaping DAC
    • Mar.
    • E. Foglemen, J. Welz, and I. Galton, “An audio ADC delta-sigma modulator with 100-dB peak SINAD and 102-dB DR using a second-order mismatch-shaping DAC,” IEEE J. Solid-State Circuits, vol. 36, no. 3, pp. 339–348, Mar. 2001.
    • (2001) IEEE J. Solid-State Circuits , vol.36 , Issue.3 , pp. 339-348
    • Foglemen, E.1    Welz, J.2    Galton, I.3
  • 9
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    • A tight signal-band power bound on mismatch noise in a mismatch-shaping digital-to-analog converter
    • Apr.
    • J. Welz and I. Galton, “A tight signal-band power bound on mismatch noise in a mismatch-shaping digital-to-analog converter,” IEEE Trans. Inf. Theory, vol. 50, no. 4, pp. 593–607, Apr. 2004.
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    • Welz, J.1    Galton, I.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.