Analyzing block locality in Morton-order and Morton-hybrid matrices

Proceedings of the 2006 Workshop on MEmory Performance: DEaling with Applications, Systems and Architectures, MEDEA '06

Volumn 2006, Issue , 2006, Pages 5-12

  Lorton, K Patrick ^a   Wise, David S ^a  

^a INDIANA UNIVERSITY   (United States)

Author keywords

Cholesky factorization; Morton order; Quadtrees

Indexed keywords

ALGORITHMS; BANDWIDTH; COMPUTATION THEORY; ITERATIVE METHODS; MICROPROCESSOR CHIPS; PROGRAM PROCESSORS; RANDOM ACCESS STORAGE;

CHOLESKY FACTORIZATION; ITERATIVE ALGORITHMS; MATRIX COMPUTATIONS; MORTON ORDER; QUADTREES;

COMPUTER ARCHITECTURE;

EID: 34248336283     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1166133.1166134     Document Type: Conference Paper

References (26)

1. M. D. Adams and D. S. Wise. Fast additions on masked integers. SIGPLAN Not., 41(5):39-45, May 2006. http://doi.acm.art/10.1145/1149982.1149987
2. M. Bader and C. Zenger. Cache oblivious matrix multiplication using an element ordering based on the Peano curve. In Parallel Processing and Applied Mathematics, volume 3911 of Lecture Notes in Comput. Sci., pages 1042-1049, Berlin, 2006. Springer. http://dx.doo.org/10.1007/11752578_126
3. S. Chatterjee, A. R. Lebeck, P. K. Patnala, and M. Thottenthodi. Recursive array layouts and fast parallel matrix multiplication. IEEE Trans. Parallel Distrib. Syst., 13(11):1105-1123, Nov. 2002. http://dx.doi.org/10. 1109/TPDS.2002.1058095
4. J. J. Dongarra, J. Du Croz, S. Hammarling, and I. S. Duff. A set of level 3 Basic Linear Algebra Subprograms. ACM Trans. Math. Softw., 16(1): 1-17, Mar. 1990. http://doi.acm.org/10.1145/77626.79170
5. G. C. Fox. A graphical approach to load balancing and sparse matrix-vector multiplication. In M. Schultz, editor, Numerical Algorithms for Modern Parallel Architectures, volume 13 of IMA Vol. in Math. & Appl., pages 37-61. Springer, New York, 1988.
6. B. B. Fraguela, J. Guo, G. Bikshandi, M. J. Garzarán, G. Almási, J. Moreira, and D. Padua. The hierarchically tiled arrays programming approach. In LCR '04: Proc. 7th Wkshp. Languages, Compilers, and Run-Time Support for Scalable Systems, volume 81 of ACM Int. Conf. Proc. Series, pages 1-12. ACM Press, New York, 2004. http://doi.acm.org/10.1145/ 1066650.1066657
7. M. Frigo, C. E. Leiserson, H. Prokop, and S. Ramachandran. Cache-oblivious algorithms. In Proc. 40th Ann. Symp. Foundations of Computer Science, pages 285-298. IEEE Computer Soc. Press, Washington, DC, Oct. 1999. http://dx.doi.org/10.1109/SFFCS.1999.814600
8. S. T. Gabriel, B. Chenoweth, K. P. Lorton, M. Carlson, and D. S. Wise. The Opie Compiler Distribution. Indiana University, Bloomington, IN, Apr. 2005. http://www.cs.indiana.edu/~dswise/Opie/distribution.html
9. S. T. Gabriel and D. S. Wise. The Opie compiler from rowmajor source to Morton-ordered matrices. In J. Carter and L. Zhang, editors, Proc. 3rd Wkshp. on Memory Performance Issues, pages 136-144. ACM Press, New York, 2004. http://doi.acm.org/10.1145/1054943.1054962
10. I. Gargantini. An effective way to represent quadtrees. Commun. ACM, 25(12):905-910, Dec. 1982. http://doi.acm.org/10.1145/358728.358741
11. G. H. Golub and C. F. Van Loan. Matrix Computations. The Johns Hopkins Univ. Press, Baltimore, third edition, 1996.
12. K. Goto and R. van de Geijn. On reducing TLB misses in matrix multiplication. FLAME Working Note 9, Univ. of Texas, Austin, Nov. 2002. http://www.cs.atexas.edu/users/flame/pubs/GOTO.ps.gz
13. K. Goto and R. A. van de Geijn. Anatomy of high-performance matrix multiplication. Technical report, Univ. of Texas, Austin. Submittted for publication. Visited Sept. 2006. http://www.cs.atexas.edu/users/flame/pubs/ GOTO_TOMS.pdf
14. Innovative Computing Laboratory, Univ. of Tennessee, Knoxville, TN. Performance Application Programming Interface (PAPI), Dec. 2005. http://icl.cs.utk.edu/papi/
15. D. S. Johnson. A theoretician's guide to the experimental analysis of algorithms. In M. H. Goldwasser, D. S. Johnson, and C. C. McGeoch, editors, Data Structures, Near Neighbor Searches, and Methodology: 5th & 6th DIMACS Implementation Challenges, volume 59 of DIMACS Ser. Discrete Math. Theoret. Comput. Sci., pages 215-250. Amer. Math. Soc., Providence, 2002. http://www.research.att.com/~dsj/papers.html
16. K. Li. Scalable parallel matrix multiplication on distributed memory parallel computers. In 14th Int. Parallel and Distributed Processing Symp. (IPDPS'00), pages 307-314. IEEE Computer Soc. Press, Washington, DC, May 2000. http://dx.doi.org/10.1109/IPDPS.2000.846000
17. J. Markoff. Writing the fastest code, by hand, for fun: A human computer keeps speeding up chips. The New York Times, CLV(53,412):C1, C6, 2005 Nov. 28. http://www.nytimes.com/2005/11/28/technology/28super.html
18. G. M. Morton. A computer oriented geodetic data base and a new technique in file sequencing. Technical report, IBM Ltd., Ottawa, Ontario, Mar. 1966.
19. N. Park, B. Hong, and V. K. Prasanna. Tiling, block data layout, and memory hierarchy performance. IEEE Trans. Parallel Distrib. Syst., 14(7):640-654, July 2003. http://dx.doi.org/10.1109/TPDS.2003.1214317
20. H. Samet. The Design and Analysis of Spatial Data Structures, section 2.7. Addison-Wesley, Reading, MA, 1990.
21. J. Sang Park, M. Penner, and V. K. Prasanna. Optimizing graph algorithms for improved cache performance. IEEE Trans. Parallel Distrib. Syst., 15(9):769-782, Sept. 2004. http://dx.doi.org/10.1109/TPDS.2004.44
22. G. Schrack. Finding neighbors of equal size in linear quadtrees and octrees in constant time. CVGIP: Image Underst., 55(3):221-230, May 1992.
23. V. Valsalam and A. Skjellum. A framework for high-performance matrix multiplication based on hierarchical abstractions, algorithms and optimized low-level kernels. Concur. Comp. Prac. Exper., 14(10): 805-839, 2002. http://dx.doi.org/10.1002/cpe.630
24. D. S. Wise. Ahnentafel indexing into Morton-ordered arrays, or matrix locality for free. In A. Bode, T. Ludwig, W. Karl, and R. Wismüller, editors, Euro-Par 2000 - Parallel Processing, volume 1900 of Lecture Notes in Comput. Sci., pages 774-883. Springer, Heidelberg, 2000. http://www.springerlink.com/link.asp?id=0pc0e9gfk4x9j5fa
25. D. S. Wise, C. L. Citro, J. J. Hursey, F. Liu, and M. A. Rainey. A paradigm for parallel matrix algorithms: Scalable Cholesky. In J. C. Cunha and P. D. Medeiros, editors, Euro-Par 2005 - Parallel Processing, number 3648 in Lecture Notes in Comput. Sci., pages 687-698. Springer, Berlin, Aug. 2005. http://dx.doi.org/10.1007/11549468_76
26. M. Wolfe. More iteration space tiling. In Proc. Supercomputing '89, pages 655-664. ACM Press, New York, NY, USA, Nov. 1989.