Hybrid architectures for efficient and secure face authentication in embedded systems

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 15, Issue 3, 2007, Pages 296-308

  Aaraj, Najwa ^a,b   Ravi, Srivaths ^a,c   Raghunathan, Anand ^a,d   Jha, Niraj K ^a,b  

^a IEEE   (United States)

^b Princeton University   (United States)

^c TEXAS INSTRUMENTS   (India)

^d NEC LABORATORIES AMERICA   (United States)

Author keywords

Coprocessors; Custom instructions; Embedded systems; Face biometrics; Multiprocessor systems; Security

Indexed keywords

COPROCESSORS; CUSTOM INSTRUCTIONS; FACE BIOMETRICS; MULTIPROCESSOR SYSTEMS;

ALGORITHMS; BAYESIAN NETWORKS; BIOMETRICS; COMPUTATIONAL METHODS; COMPUTER SOFTWARE; OPTIMIZATION;

EMBEDDED SYSTEMS;

EID: 34247128730     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2007.893608     Document Type: Article

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