Efficient timing-driven incremental routing for VLSI circuits using DFS and localized slack-satisfaction computations

Proceedings -Design, Automation and Test in Europe, DATE

Volumn 1, Issue , 2006, Pages

  Dutt, Shantanu ^a   Arslan, Kasan ^a  

^a UNIVERSITY OF ILLINOIS AT CHICAGO   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATION THEORY; OPTIMIZATION; ROUTING PROTOCOLS; SOFTWARE ENGINEERING; VLSI CIRCUITS;

ENGINEERING CHANGE ORDERS (ECO); PARTIAL ROUTING TREE;

COMPUTER ARCHITECTURE;

EID: 34047177514     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/date.2006.244117     Document Type: Conference Paper

References (11)

1. J.M. Emmert and D. Bhatia. "Incremental Routing in FPGAs". Proc. IEEE Int. ASIC Conference and Exhibit,'98.
2. J. Cone and M. Sarrafzadeh. 'Incremental Physical Design". ISPD, April 2000, pp. 84-92.
3. S. Dutt, V. Verma and H. Arslan, "A Search-Based Bump-and-Refit Approach to Incremental Routing for ECO Appl. in FPGAs", ACM TODAES, pp.664-693, 2002.
4. S. Dutt, V. Shanmugavel and S. Trimberger, "Efficient Incremental Rerouting for Fault Reconf. in FPGAs",ICCAD, pp.173-176, 1999.
5. H. Arslan and S. Dutt, "A Depth-First Search Controlled Gridless incremental routing Algorithm for VLSI Circuits", ICCD, 2004, pp. 86-92.
6. H. Hou and S. S. Sapatnekar. "Routing Tree Topology Construction to Meet Interconnect Timing Constraints", ISPD, pp. 205-210, 1998.
7. K.D. Boese and A.B. Kahng and B.A. McCoy and G. Robins, "Fidelity and Near-Optimality of Elmore-Based Routing Constructions", ICCD, pp.81-84, 1993.
8. K.D. Boese and A.B. Kahng and B.A. McCoy and G. Robins. "Near-Optimal Critical Sink Routing Tree Constructions", IEEE-TCAD, pp. 1417-1436, 1995.
9. D. Wang and E. S. Kuh. "A New Timing-Driven Multilayer MCM/IC Routing Algorithm", IEEE-MCMC, pp. 89-94, 1997.
10. H. Xiang and K-Y. Chao and M. D. F. Wong. "An ECO Algorithm for Eliminating Crosstalk Violations", ISPD, 2004.
11. J. Cong,"Challenges and Opportunities for Design Innovations in Nanometer Technologies," Frontiers in Semiconductor Research: A Collection of SRC Working Papers, SRC, 1997.