A depth-first-search controlled gridless incremental routing algorithm for VLSI circuits

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 2004, Pages 86-92

  Arslan, Hasan ^a   Dutt, Shantanu ^a  

^a UNIVERSITY OF ILLINOIS AT CHICAGO   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DEPTH-FIRST SEARCH (DFS); ENGINEERING CHANGE ORDER (ECO); INTERCONNECTS; VARIABLE SPACING;

ALGORITHMS; ERROR ANALYSIS; FIELD PROGRAMMABLE GATE ARRAYS; MARKETING; PRODUCT DESIGN; TOPOLOGY; VLSI CIRCUITS;

ROUTERS;

EID: 17644369352     PISSN: 10636404     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCD.2004.1347905     Document Type: Conference Paper

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