Algorithm-Driven synthesis of data conversion architectures

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 16, Issue 10, 1997, Pages 1116-1135

  Horta, Nuno C ^a   Franca, José E ^a  

^a UNIVERSIDADE NOVA DE LISBOA   (Portugal)

Author keywords

Analog digital conversion, design automation; hardware description languages; high level synthesis; signal flow graphs

Indexed keywords

EID: 34047175651     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.662675     Document Type: Article

References (35)

1. [1R. Van de Plassche, Integrated Analog-to-Digital and Digital-to-Analog Converters. Norwell, MA: Kluwer, 1994.
2. [2P. R. Gray and R. R. Neff, Analog-digital conversion techniques for telecommunications applications in Design of Analog-Digital VLSI Circuits for Telecommunications and Signal Processing, 3. E. Franca and Y. Tsividis, Eds. Englewood Cliffs, NJ: Prentice-Hall, 1994.
3. [3B. Razavi, Principles of Data Conversion Systems Design. Piscataway, NJ: IEEE Press, 1995.
4. [4P. E. Allen, A tutorial-computer aided design of analog integrated circuits in Proc. IEEE Custom Integrated Circuits Conf., 1986, pp. 608-616.
5. [5E. Berkcan and F. Yassa, Toward mixed analog/digital design automation: A review in Proc. IEEE Int. Symp. Circuits Syst., 1990, pp. 809-815.
6. [6G. G. E. Gielen and J. E. Franca, CAD tools for data converter design: An overview IEEE Trans. Circuits Syst. II,43, no. 2, pp. 77-89, 1996.
7. [7P. E. Alien and P. R. Barton, A silicon compiler for successive approximation A/D and D/A converters in Proc. IEEE Custom Integrated Circuits Conf., 1986, pp. 552-555.
8. [8W. J. Helms and B. E. Byrkett, Compiler generation of A to D converters in Proc. IEEE Custom Integrated Circuits Conf, 1987, pp. 161-164.
9. [9J. G. Kenney and L. R. Carley, CLANS: A high-level synthesis tool for high resolution data converters in Proc. IEEE Int. Conf. Comput. Aided Design, 1988, pp. 496-499.
10. [10G. Jusuf, P. R. Gray, and A. L. Sangiovanni-Vincentelli, CADICS-Cyclic analog-to-digital converter synthesis in Proc. IEEE Int. Conf. Comput. Aided Design, 1990, pp. 286-289.
11. [11S. G. Sabiro, P. Senn, and M. S. Tawfik, HiFADiCC: A prototype framework of a highly flexible analog to digital converters silicon compiler in Proc. IEEE Int. Symp. Circuits Syst., 1990, pp. 1114-1117.
12. [12N. C. Horta, J. E. Franca, and C. A. Lerne, in Automated high level synthesis of data conversion systems Analogue-Digital ASIC's. Steenage, U.K.: Peter Peregrinus, 1991.
13. [13_, Framework for architecture synthesis of data conversion systems employing binary-weighted capacitor arrays in Proc. IEEE Int. Symp. Circuits Syst., 1991, pp. 1789-1792.
14. [14N. C. Horta, J. Vital, and J. E. Franca, Automatic multi-level macromodel generation for data conversion systems employing binaryweighted capacitor arrays in Proc. IEEE Int. Symp. Circuits Systems, 1992, pp. 2561-2564.
15. [15J. C. Vital, N. C. Horta, N. S. Suva, and J. E. Franca, CATALYST: A highly flexible CAD tool for architecture-level design and analysis of data converters in Proc. IEEE Eur. Design Automation Conf., 1993, pp. 472-77.
16. [16E. S. Ochotta, R. A. Rutenbar, and L. R. Carley, ASTRX/OBLX: Tools for rapid synthesis of high-performance analog circuits in Proc. 3Ist ACM/IEEE Design Automation Conf., 1994, pp. 24-30.
17. [17F. Medeiro, B. Ferez-Verdti, A. Rodrïguez-Vâsquez, and J. L. Huertas, A vertically-integrated tool for automated design of EA modulators in Proc. Eur. Solid-State Circuits Conf., 1994, pp. 164-167.
18. [18H. Chang, E. Liu, R. Neff, E. Felt, E. Malavasi, E. Charbon, A. Sangiovanni-Vincentelli, and P. R. Gray, Top-down, constraint-driven methodology based generation of ra-bit interpolative current source D/A converters in Proc. IEEE Custom Integrated Circuits Conf., 1994, pp. 369-372.
19. [19H. Chang, E. Felt, and A. Sangiovanni-Vincentelli, Top-down, constraint-driven methodology based generation of a second order E-A A/D converter in Proc. IEEE Custom Integrated Circuits Conf., 1995, pp. 533-536.
20. [20N. Horta and J. Franca, Formal description of data conversion algorithms for automatic synthesis in Proc. IEEE Midwest Symp. Circuits Syst., 1994, pp. 370-373.
21. [21ANACAD Computer Systems, FIDELDO V4.1.0-User's manual 1992.
22. [22ANACAD Computer Systems, ELDO V4.4.1-User's manual 1994.
23. [23B. Stroustrup, The C++ Programming Language. Reading, MA: Addison-Wesley, 1986.
24. [24P. E. Allen, B. P. Lum Shue Chan, and W. M. Zuberek, Comparison of mixed analog-digital simulators in Proc. IEEE Int. Symp. Circuits Syst., 1990, pp. 101-104.
25. [25N. C. Horta and J. E. Franca, Automatic synthesis of data conversion systems using symbolic techniques in Proc. IEEE Midwest Symp. Circuits Syst., 1995, pp. 877-880.
26. [26K. Thulasiraman and M. N. S. Swamy, Graphs: Theory and Algorithms. New York: Wiley, 1992.
27. [27S. J. Mason, FEEDBACK THEORY-Some properties of signal flow graphs Proc. IRE,41, no. 9, pp. 1144-1156, 1953.
28. [28_, FEEDBACK THEORY-Further properties of signal flow graphs Proc. IRE,44, no. 7, pp. 920-926, 1956.
29. [29C. L. Coates, Flow graph solutions of linear algebraic equations IRE Trans. Circuit Theory,CT-6, pp. 170-187, 1959.
30. [30N. C. Horta and J. E. Franca, A methodology for automatic generation of data conversion topologies from algorithms in Proc. IEEE Int. Symp. Circuits Syst., 1994, pp. 371-374.
31. [31_, High-level data conversion synthesis by symbolic methods in Proc. IEEE Int. Symp. Circuits Syst., 1996, pp. 802-805.
32. [32N. C. Horta, Automatic synthesis of data conversion systems from algorithm descriptions Ph.D. dissertation, Universidade Técnica de Lisboa, Instituto Superior Técnico, Portugal June, 1997.
33. [33N. E. Franca, M. A. Lança, and J. E. Franca, OpCadsys: An open tool for automatic synthesis of circuits components for data converters in Proc. IEEE Midwest Symp. Circuits Syst., 1994, pp. 343-346.
34. [34B. S. Song, S. H. Lee, and M. F. Tompsett, A 10-b 15-MHz CMOS recycling two-step A/D converter IEEE J. Solid-State Circuits, 25, no. 6, pp. 1328-1337, 1990.
35. [35J. C. Vital, Analog-digital data conversion integrated system with functional reconfiguration and digital testability Ph.D. dissertation, Institute Superior Técnico, Universidade Técnica de Lisboa, May 1994.