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Volumn 1, Issue , 2006, Pages

Area-efficient error protection for caches

Author keywords

[No Author keywords available]

Indexed keywords

ERROR CORRECTING CODE (ECC); ERROR PROTECTION SCHEME; PARITY CHECK CODES; SUPERSCALAR PROCESSORS;

EID: 34047170876     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (27)

References (14)
  • 1
    • 0034450511 scopus 로고    scopus 로고
    • Impact of CMOS technology scaling on the atmospheric neutron soft error rate
    • P. Hazucha and C. Svensson. Impact of CMOS technology scaling on the atmospheric neutron soft error rate. IEEE Transactions on Nuclear Science, 47(6), 2000.
    • (2000) IEEE Transactions on Nuclear Science , vol.47 , Issue.6
    • Hazucha, P.1    Svensson, C.2
  • 3
    • 84856104715 scopus 로고    scopus 로고
    • Historical trend in alpha-particle induced soft error rates of the Alpha microprocessor
    • N. Seifert, D. Moyer, N. Leland, and R. Hokinson. Historical trend in alpha-particle induced soft error rates of the Alpha microprocessor. IEEE Transactions on VLSI, 9(1), 2001.
    • (2001) IEEE Transactions on VLSI , vol.9 , Issue.1
    • Seifert, N.1    Moyer, D.2    Leland, N.3    Hokinson, R.4
  • 4
    • 0036504519 scopus 로고    scopus 로고
    • POWER4 system design for high reliability
    • March- April
    • D. C. Bossen, J. M. Tendler, and K. Reick. POWER4 system design for high reliability. IEEE Micro, March- April, 2002.
    • (2002) IEEE Micro
    • Bossen, D.C.1    Tendler, J.M.2    Reick, K.3
  • 5
    • 0034273728 scopus 로고    scopus 로고
    • High availability and reliability in the itanium processor
    • Sept-Oct
    • N. Quach. High availability and reliability in the itanium processor. IEEE Micro, Sept-Oct, 2000.
    • (2000) IEEE Micro
    • Quach, N.1
  • 8
    • 0031340339 scopus 로고    scopus 로고
    • Profileme: Hardware support for instruction level profiling on out-of-order processors
    • J. Dean, J. Hicks, et al. Profileme: hardware support for instruction level profiling on out-of-order processors. Proc. International Symposium on Microarchitecture, 1997.
    • (1997) Proc. International Symposium on Microarchitecture
    • Dean, J.1    Hicks, J.2
  • 13
    • 34047185469 scopus 로고    scopus 로고
    • SPEC2000 Binaries. http://www.eecs.umich.edu/~chriswe/benchmarks/ spec2000.html
    • (2000) Binaries
    • SPEC1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.