A control theoretic approach to run-time energy optimization of pipelined processing in MPSoCs

Proceedings -Design, Automation and Test in Europe, DATE

Volumn 1, Issue , 2006, Pages

  Alimonda, Andrea ^a   Acquaviva, Andrea ^b   Carta, Salvatore ^a   Pisano, Alessandro ^a  

^a UNIVERSITY OF CAGLIARI   (Italy)

^b UNIVERSITY OF URBINO   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; FEEDBACK CONTROL; MICROPROCESSOR CHIPS; PIPELINE PROCESSING SYSTEMS; PROGRAM PROCESSORS; REAL TIME CONTROL;

INTERPROCESSORS; MULTI PROCESSOR SYSTEM ON CHIP (MPSOC); PIPELINED ARCHITECTURES;

COMPUTER ARCHITECTURE;

EID: 34047164565     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/date.2006.243772     Document Type: Conference Paper

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