A 60mW 10b CMOS image sensor with column-to-column FPN reduction

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2000, Pages 108-109

  Sugiki, T ^a   Ohsawa, S ^a   Miura, H ^a   Sasaki, M ^a   Nakamura, N ^a   Inoue, I ^a   Hoshino, M ^a   Tomizawa, Y ^a   Arakawa, T ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; CAPACITORS; CMOS INTEGRATED CIRCUITS; COMPARATOR CIRCUITS; CURRENT VOLTAGE CHARACTERISTICS; FEEDBACK AMPLIFIERS; MOS DEVICES; PHOTODIODES; SAMPLING; SPURIOUS SIGNAL NOISE; THRESHOLD VOLTAGE;

CLAMPING CIRCUITS; CORRELATED DOUBLE SAMPLING (CDS); FIXED PATTERN NOISE (FPN);

IMAGE SENSORS;

EID: 0034428238     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. A 1/4 inch 330k square pixel progressive scan CMOS active pixel sensor
2. An addressable 256×256 photodiode image sensor array with an 8b digital output
3. CMOS digital camera with parallel analog-to-digital conversion architecture
4. Megapixel CMOS APS with analog and digital readout
5. New LV-BPD0(low voltage buried photo-diode) for CMOS imager