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Volumn 11, Issue 2, 2007, Pages 167-169

Design of prunable interleavers for parallel turbo decoder architectures

Author keywords

Parallel implementation; Prunable interleavers; Turbo codes

Indexed keywords

COMPUTER SIMULATION; DECODING; ERROR CORRECTION;

EID: 33947638953     PISSN: 10897798     EISSN: None     Source Type: Journal    
DOI: 10.1109/LCOMM.2007.061131     Document Type: Article
Times cited : (5)

References (7)
  • 1
    • 16444366247 scopus 로고    scopus 로고
    • "Parallel interleaver design and VLSI architecture for low-latency MAP turbo decoders"
    • April
    • R. Dobkin, M. Peleg, and R. Ginosar, "Parallel interleaver design and VLSI architecture for low-latency MAP turbo decoders," IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 13, no. 4, pp. 427-438, April 2005.
    • (2005) IEEE Trans. Very Large Scale Integr. (VLSI) Syst. , vol.13 , Issue.4 , pp. 427-438
    • Dobkin, R.1    Peleg, M.2    Ginosar, R.3
  • 2
    • 4544260488 scopus 로고    scopus 로고
    • "Mapping interleaving laws to Parallel Turbo and LDPC Decoder Architectures"
    • Sept
    • A. Tarable, S. Benedetto, and G. Montorsi, "Mapping interleaving laws to Parallel Turbo and LDPC Decoder Architectures," IEEE Trans. Inf. Theory, vol. 50, no. 9, pp. 2002-2009, Sept. 2004.
    • (2004) IEEE Trans. Inf. Theory , vol.50 , Issue.9 , pp. 2002-2009
    • Tarable, A.1    Benedetto, S.2    Montorsi, G.3
  • 4
    • 0003643471 scopus 로고    scopus 로고
    • "Multiplexing and channel coding (FDD)"
    • Third Generation Partnership Project/Universal Mobile Telecommunication Systems, 3GTS 25.212, version 3.4.0 (release)
    • Third Generation Partnership Project/Universal Mobile Telecommunication Systems, "Multiplexing and channel coding (FDD)," 3GTS 25.212, version 3.4.0 (release 2000), www.3gpp.org.
    • (2000)
  • 5
    • 28444489724 scopus 로고    scopus 로고
    • "Design of fast-prunable S-random interleavers"
    • Sept
    • L. Dinoi and S. Benedetto, "Design of fast-prunable S-random interleavers," IEEE Trans. Wireless Commun., vol. 4, no. 5, pp. 2540-2548, Sept. 2005
    • (2005) IEEE Trans. Wireless Commun. , vol.4 , Issue.5 , pp. 2540-2548
    • Dinoi, L.1    Benedetto, S.2
  • 6
    • 28844496344 scopus 로고    scopus 로고
    • "Variable-size interleaver design for parallel turbo decoder architectures"
    • Nov
    • L. Dinoi and S. Benedetto, "Variable-size interleaver design for parallel turbo decoder architectures," IEEE Trans. Commun., vol. 53, no. 11, pp. 1833-1840, Nov. 2005.
    • (2005) IEEE Trans. Commun. , vol.53 , Issue.11 , pp. 1833-1840
    • Dinoi, L.1    Benedetto, S.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.