System LSI multi-Vth transistors design methodology for maximizing efficiency of body-biasing control to reduce Vth variation and power consumption

Technical Digest - International Electron Devices Meeting, IEDM

Volumn 2005, Issue , 2005, Pages 68-71

  Yasuda, Y ^a   Kimizuka, N ^a   Akiyama, Y ^a   Yamagata, Y ^a   Goto, Y ^a   Imai, K ^a  

^a RENESAS TECHNOLOGY CORP   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

BIAS CURRENTS; DIELECTRIC MATERIALS; ENERGY CONSERVATION; GATES (TRANSISTOR); LOGIC DESIGN; WORK FUNCTION;

BODY BIASING CONTROLLABILITY; DIELECTRIC WORK FUNCTION MODULATION; MULTI-VTH TRANSISTORS; OPTIMAL CHANNEL DESIGN;

LSI CIRCUITS;

EID: 33847750298     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. M. Togo et al., VLSI Tech. Symp., p.88, 2004.
2. A. Keshavarzi et al., VLSI Circuits Symp., p.312, 2002.
3. Y. Yasuda et al., VLSI Tech. Symp., p.40, 2004.
4. N. Kimizuka et al., VLSI Tech. Symp., p.218, 2005.
5. H. C.-H. Wang et al., IEDM Tech. Dig., p.161, 2004.
6. Y. Shimamoto et al., VLSI Tech. Symp., p. 132, 2005.