Intermodulation distortion in CMOS attenuators and switches

IEEE Journal of Solid-State Circuits

Volumn 42, Issue 3, 2007, Pages 529-539

  Dogan, Hakan ^a,b   Meyer, Robert G ^a,c  

^a IEEE   (United States)

^b Atheros Communications   (United States)

^c UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Attenuators; CMOS; Distortion; Harmonic balance; Pi network; Switches; T network; Volterra

Indexed keywords

CMOS ATTENUATORS; DISTORTION; HARMONIC BALANCE; PI-NETWORKS; T-NETWORK; VOLTERRA;

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC SWITCHES; GAIN CONTROL; INTEGRATED CIRCUIT LAYOUT; TOPOLOGY;

ELECTRIC ATTENUATORS;

EID: 33847732977     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2006.891445     Document Type: Article

References (18)

1. D. Fisher and D. Dobkin, "A temperature-compensated linearizing technique for MMIC attenuators utilizing GaAs MESFETs as voltage-variable resistors," in IEEE MTT-S Dig., May 1990, pp. 781-784.
2. R. Kaunisto, P. Korpi, J. Kiraly, and K. Halonen, "A linear-control wideband CMOS attenuator," in Proc. IEEE ISCAS, 2001, vol. 4, pp. 458-461.
3. H. Kondoh, "DC-50 GHz MMIC variable attenuator with a 30 dB dynamic range," in IEEE MTT-S Dig., Jun. 1988, pp. 499-502.
4. M. T. Terrovitis and R. G. Meyer, "Intermodulation distortion in current-commutating CMOS mixers," IEEE J. Solid-State Circuits, vol. 35, no. 10, pp. 1461-1473, Oct. 2000.
5. Y. Tsividis, K. Suyama, and K. Vavelidis, "Simple reconciliation MOSFET model valid in all regions," Electron. Lett., pp. 506-508, Mar. 1995.
6. Y. Tsividis, Operation and Modeling of the MOS Transistor. New York: McGraw-Hill, 1999.
7. K. L. Fong and R. G. Meyer, "High-frequency nonlinearity analysis of common-emitter and differential pair transconductance stages," IEEE J. Solid-State Circuits, vol. 33, no. 4. pp. 548-555, Apr. 1998.
8. R. G. Meyer, "Intermodulation in high-frequency bipolar transistor integrated-circuit mixers," IEEE J. Solid-State Circuits, vol. SC-21, no. 4, pp. 534-537, Aug. 1986.
9. W. M. C. Sansen and R. G. Meyer, "Distortion in bipolar transistor variable-gain amplifiers," IEEE J. Solid-State Circuits, vol. SC-8, no. 4, pp. 275-282, Aug. 1973.
10. H. Dogan, R. G. Meyer, and A. M. Niknejad, "A DC-2.5 GHz wide-dynamic-range attenuator in 0.13 μm CMOS technology," in Proc. VLSI Circuits Symp., 2005, pp. 90-93.
11. _, "A DC-10 GHz linear-in-dB attenuator in 0.13 μm CMOS technology," in Proc. IEEE Custom Integrated Circuits Conf., 2004, pp. 609-612.
12. "BSIM3 Version 3 Manual, Final Version," BSIM Research Group, Dept. Elec. Eng. Comput. Sci., Univ. California, Berkeley [Online]. Available: http://www-device.EECS.Berkeley.EDU/-bsim3
13. R. Bayruns et al., "The Bootstrapped Gate FET (BGFET) - a new control transistor," in Proc. IEEE GaAs IC Symp., 1995, pp. 136-139.
14. R. H. Caverly, "Linear and nonlinear characteristics of the silicon CMOS monolithic 50-Ω microwave and RF control element," IEEE J. Solid-State Circuits, vol. 34, no. 1, pp. 124-126, Jan. 1999.
15. R. G. Meyer and P. R. Gray, Analysis and Design of Analog Integrated Circuits, 3rd ed. New York: Wiley, 1993.
16. S. W. Son, "High dynamic range CMOS mixer design," Ph.D. dissertation, Univ. California, Berkeley, 2002.
17. H. J. Sun and J. Ewan, "A 2-18 GHz monolithic variable attenuator using novel triple-gate MESFETs," in IEEE MTT-S Dig., 1990, pp. 777-780.
18. K. Vavelidis, Y. Tsividis, F. O. Eynde, and Y. Papananos, "Six terminal MOSFETs: modeling and applications in highly linear, electronically tunable resistors," IEEE J. Solid-State Circuits, vol. 32, no. 1, pp. 4-12, Jan. 1997.