Long retention and low voltage operation using IrO2/HfAlO/HfSiO/ HfAlO gate stack for memory application

Technical Digest - International Electron Devices Meeting, IEDM

Volumn 2005, Issue , 2005, Pages 162-165

  Wang, Y Q ^a   Singh, P K ^a   Yoo, W J ^a   Yeo, Y C ^a   Samudra, G ^a   Chin, Albert ^b   Hwang, W S ^a   Chen, J H ^a   Wang, S J ^c   Kwong, D L ^d,e  

^a NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

^b NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

^c INSTITUTE OF MATERIALS RESEARCH AND ENGINEERING   (Singapore)

^d INSTITUTE OF MICROELECTRONICS   (Singapore)

^e UNIVERSITY OF TEXAS AT AUSTIN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHARGE TRAPPING; DATA STORAGE EQUIPMENT; ELECTRIC POTENTIAL; ELECTRIC PROPERTIES; HAFNIUM COMPOUNDS; IRIDIUM COMPOUNDS;

DECAY RATIO; GATE STACKS; MEMORY STRUCTURE; TRAPPING CAPABILITY;

GATES (TRANSISTOR);

EID: 33847725110     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)

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