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Volumn 2, Issue , 2005, Pages 772-775

Interconnect delay optimization using a novel hybrid insertion strategy

Author keywords

Delay; Differential signaling; Insertion strategy; Interconnects; Low swing; Power

Indexed keywords

DIGITAL CIRCUITS; ELECTRIC NETWORK ANALYSIS; SEMICONDUCTOR DEVICE MANUFACTURE; TELECOMMUNICATION REPEATERS;

EID: 33847298641     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (1)

References (8)
  • 1
    • 33847250044 scopus 로고    scopus 로고
    • ITRS, 2001ed. Semiconductor Industry Assoc, San Jose, CA.
    • ITRS, 2001ed. Semiconductor Industry Assoc, San Jose, CA.
  • 5
    • 33847260789 scopus 로고    scopus 로고
    • W. Dally, A Single-Chip Terabit Switch, Proc. of IEEE Hot Chips 13, (Palo Alto, USA, 2001)
    • W. Dally, A Single-Chip Terabit Switch, Proc. of IEEE Hot Chips 13, (Palo Alto, USA, 2001)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.