Low loss multi-wafer vertical interconnects for three dimensional integrated circuits

35th European Microwave Conference 2005 - Conference Proceedings

Volumn 1, Issue , 2005, Pages 177-180

  Lahiji, Rosa R ^a   Herrick, Katherine J ^b   Mohammadi, Saeed ^a   Katehi, Linda P B ^a  

^a PURDUE UNIVERSITY   (United States)

^b Raytheon RF Components   (United States)

Author keywords

Integrated circuit packaging; Microstrip line; Vertical interconnects

Indexed keywords

INTEGRATED CIRCUIT PACKAGING; MICROSTRIP-BASED CIRCUIT ARCHITECTURE; MULTI-WAFER VERTICAL INTERCONNECT; VERTICAL INTERCONNECTS;

ELECTRONICS PACKAGING; INSERTION LOSSES; INTEGRATED CIRCUITS; MICROSTRIP LINES; REFLECTION; SEMICONDUCTING GALLIUM ARSENIDE;

INTERCONNECTION NETWORKS;

EID: 33847154061     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EUMC.2005.1608822     Document Type: Conference Paper

References (9)

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