An (8158, 7136) low-density parity-check encoder

Proceedings of the Custom Integrated Circuits Conference

Volumn 2005, Issue , 2005, Pages 699-702

  Miles, L ^a   Gambles, J ^a   Maki, G ^a   Ryan, W ^b   Whitaker, S ^a  

^a UNIVERSITY OF IDAHO   (United States)

^b University of Arizona   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BINARY CODES; BOOLEAN ALGEBRA; CMOS INTEGRATED CIRCUITS; FLIP FLOP CIRCUITS; POLYNOMIALS; SHIFT REGISTERS;

PARITY CHECK ENCODERS; PARITY REGISTERS; PARTIAL PRODUCT MULTIPLICATION;

ENCODING (SYMBOLS);

EID: 33847141037     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2005.1568764     Document Type: Conference Paper

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