Influence of component position on lead-free solder interconnections during drop test

Proceedings of 7th Electronics Packaging Technology Conference, EPTC 2005

Volumn 1, Issue , 2005, Pages 54-57

  Bonnaud, E L ^a,b   Gudmundson, P ^b  

^a Infineon Technologies Sweden AB   (Sweden)

^b ROYAL INSTITUTE OF TECHNOLOGY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; IMPACT TESTING; MODAL ANALYSIS; SOLDERED JOINTS; STRESS ANALYSIS; TIN ALLOYS;

DROP TEST FAILURE CRITERION; DROP TESTING; LEAD-FREE SOLDER;

ELECTRIC POWER SYSTEM INTERCONNECTION;

EID: 33847127393     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)

1. JEDEC Standard JESD22-B111, "Board Level Drop Test Method of Components for Handheld Electronic Products," 2003.
2. th Electronics Packaging Technology Conference, Singapore, Dec. 2002.
3. th Electronics Packaging Technology Conference, Singapore, Dec. 2004.
4. th Electronics Packaging Technology Conference, Singapore, Dec. 2004.
5. th Electronics Packaging Technology Conference, Singapore, Dec. 2004.
6. Brown S.B. et al, "An Internal Variable Constitutive Model for Hot Working of Metals," Int. J. Plast., Vol. 5, pp. 95-130, 1989.
7. rd Electronic Components and Technology Conference, New Orleans, LA, May. 2003.
8. Ansys Version 8.1 Manual, Ansys Inc., 2002.
9. LS-Dyna Version 970 Manual, Livermore Software Technology Corporation, 2003.