메뉴 건너뛰기




Volumn 2005, Issue , 2005, Pages 447-450

Low-noise embedded CAM with reduced slew-rate match-lines and asynchronous search-lines

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CMOS INTEGRATED CIRCUITS; EMBEDDED SYSTEMS; VOLTAGE CONTROL;

EID: 33847104241     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CICC.2005.1568702     Document Type: Conference Paper
Times cited : (4)

References (6)
  • 1
    • 0030674247 scopus 로고    scopus 로고
    • Power reduction in large fan-in CMOS gates in logic arrays using selective precharge
    • C. A. Zukowski and S.-Y. Wang, "Power reduction in large fan-in CMOS gates in logic arrays using selective precharge," Great Lakes Symposium on VLSI, 1997, pp. 83-87
    • (1997) Great Lakes Symposium on VLSI , pp. 83-87
    • Zukowski, C.A.1    Wang, S.-Y.2
  • 2
    • 4444255844 scopus 로고    scopus 로고
    • A low-power content-addressable memory (CAM) using pipelined hierarchical search scheme
    • September
    • K. Pagiamtzis and A. Sheikholeslami, "A low-power content-addressable memory (CAM) using pipelined hierarchical search scheme," IEEE J. Solid-State Circuits, vol 39, no 9, pp.1512-1519, September 2004
    • (2004) IEEE J. Solid-State Circuits , vol.39 , Issue.9 , pp. 1512-1519
    • Pagiamtzis, K.1    Sheikholeslami, A.2
  • 3
    • 0242551718 scopus 로고    scopus 로고
    • A mismatch-dependent power allocation technique for match-line sensing in content-addressable memories
    • November
    • I. Arsovski and A. Sheikholeslami, "A mismatch-dependent power allocation technique for match-line sensing in content-addressable memories," IEEE J. Solid-State Circuits, vol. 38, no. 11, pp. 1958-1966, November 2003.
    • (2003) IEEE J. Solid-State Circuits , vol.38 , Issue.11 , pp. 1958-1966
    • Arsovski, I.1    Sheikholeslami, A.2
  • 4
    • 0035369412 scopus 로고    scopus 로고
    • A design for high-speed low-power CMOS fully parallel content-addressable memory macros
    • June
    • H. Miyatake, M. Tanaka, and Y. Mori, "A design for high-speed low-power CMOS fully parallel content-addressable memory macros," IEEE J. Solid-State Circuits, vol. 36, no. 6, pp. 956-968, June 2001.
    • (2001) IEEE J. Solid-State Circuits , vol.36 , Issue.6 , pp. 956-968
    • Miyatake, H.1    Tanaka, M.2    Mori, Y.3
  • 5
    • 0037245512 scopus 로고    scopus 로고
    • A ternary content-addressable memory (TCAM) based on 4T static storage and including a current-race sensing scheme
    • January
    • I. Arsovski, T. Chandler, and A. Sheikholeslami, "A ternary content-addressable memory (TCAM) based on 4T static storage and including a current-race sensing scheme," IEEE J. Solid-State Circuits, vol. 38, no. 1, pp. 155-158, January 2003.
    • (2003) IEEE J. Solid-State Circuits , vol.38 , Issue.1 , pp. 155-158
    • Arsovski, I.1    Chandler, T.2    Sheikholeslami, A.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.