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Volumn , Issue , 1999, Pages 40-44

A novel fault tolerant approach for SRAM-based FPGAS

Author keywords

Fault tolerant architecture; Fault tolerant routing; FPGA

Indexed keywords

COMPUTER PROGRAMMING; COMPUTER SCIENCE; FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 33847005578     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PRDC.1999.816210     Document Type: Conference Paper
Times cited : (4)

References (5)
  • 1
    • 0024878788 scopus 로고
    • An approach for the yield enhancement of programmable gate arrays
    • Nov
    • V. Kumar, A. Dahbura, etc. "An approach for the Yield Enhancement of Programmable Gate Arrays", Proc. IEEE Int'l Conf. Computer Aided Design, pp.226-229, Nov.1989.
    • (1989) Proc. IEEE Int'l Conf. Computer Aided Design , pp. 226-229
    • Kumar, V.1    Dahbura, A.2
  • 2
    • 0025597545 scopus 로고
    • The implementation of hardware subroutines on field programmable gate arrays
    • N. Hastie, R. Cliff, "The implementation of Hardware Subroutines on Field Programmable Gate Arrays", Proc. IEEE Custom Integrated Circuits Conf., pp. 3141-3144, 1990.
    • (1990) Proc. IEEE Custom Integrated Circuits Conf , pp. 3141-3144
    • Hastie, N.1    Cliff, R.2
  • 4
    • 0029713590 scopus 로고    scopus 로고
    • Node-covering based defect and fault tolerant methods for increased yield in FPGAS
    • Jan
    • F.Hanchek, S. Dutt, "Node-Covering Based Defect and Fault Tolerant Methods for Increased Yield in FPGAs", Proc. Int'l Conf. VLSI Design, pp. 225-229, Jan.1996.
    • (1996) Proc. Int'l Conf. VLSI Design , pp. 225-229
    • Hanchek, F.1    Dutt, S.2
  • 5
    • 0032096706 scopus 로고    scopus 로고
    • Low overhead fault-tolerant FPGA systems
    • June
    • L. John, H. Willian, etc. "Low Overhead Fault-Tolerant FPGA Systems", IEEE Trans. on VLSI Systems, Vol. 6, No. 2, June 1998.
    • (1998) IEEE Trans. on VLSI Systems , vol.6 , Issue.2
    • John, L.1    Willian, H.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.