Optimization of finite interval CMA implementation for FPGA

IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation

Volumn 2005, Issue , 2005, Pages 75-80

  Heřmánek, Antonín ^a   Schier, Jan ^a   Šůcha, Přemysl ^b   Hanzálek, Zdeněk ^b  

^a INSTITUTE OF MATHEMATICS   (Czech Republic)

^b CZECH TECHNICAL UNIVERSITY IN PRAGUE   (Czech Republic)

Author keywords

[No Author keywords available]

Indexed keywords

ARITHMETIC UNITS; EQUALIZATION ALGORITHM; INTEGER LINEAR PROGRAMMING;

ABSTRACTING; ALGORITHMS; INTEGER PROGRAMMING; ITERATIVE METHODS; LINEAR PROGRAMMING; MATHEMATICAL MODELS; OPTIMIZATION; SCHEDULING;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 33846975398     PISSN: 15206130     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SIPS.2005.1579842     Document Type: Conference Paper

References (11)

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