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Volumn 1, Issue , 2006, Pages

A reconfigurable HW/SW platform for computation intensive high-resolution real-time digital film applications

Author keywords

Digital film; FPGA; Motion estimation; Reconfigurable; Stream based architechture; Weak programming

Indexed keywords

BANDWIDTH; COMPUTER HARDWARE; COMPUTER SOFTWARE; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); INTERFACES (COMPUTER); MOTION ESTIMATION;

EID: 33846831198     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/date.2006.244085     Document Type: Conference Paper
Times cited : (9)

References (18)
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  • 9
    • 0029779084 scopus 로고    scopus 로고
    • VLSI Architecture for Motion Estimation using the Block-Matching Algorithm
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  • 10
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    • A. do Carmo Lucas and R. Ernst. An Image Processor for Digital Film. In IEEE Application-Specific Systems, Architectures, and Processors (ASAP 2005), pages 219-224. IEEE computer Society, 2005.
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    • Viper: A multiprocessor SoC for advanced set-top box and digital tv systems
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    • (2001) IEEE Design and Test of Computers, Sip , pp. 21-31
    • Dutta, S.1    Jensen, R.2    Rieckmann, A.3
  • 13
    • 84943261890 scopus 로고    scopus 로고
    • S. Heithecker, A. do Carmo Lucas, and R. Ernst. A Mixed QoS SDRAM Controller for FPGA-Based High-End Image Processing. In Proceedings of the 2003 IEEE Workshop for Signal Processing Systems, 2003.
    • S. Heithecker, A. do Carmo Lucas, and R. Ernst. A Mixed QoS SDRAM Controller for FPGA-Based High-End Image Processing. In Proceedings of the 2003 IEEE Workshop for Signal Processing Systems, 2003.
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    • Real-time motion estimation and visualization on graphics cards
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.