Process results using automatic pitch decomposition and double patterning technology (DPT) at k1eff <0.20

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 6349 II, Issue , 2006, Pages

  Huckabay, Judy ^a   Staud, Wolf ^a   Naber, Robert ^a   Van Oosten, Anton ^b   Nikolski, Peter ^b   Hsu, Stephen ^b   Socha, R J ^b   Dusa, M V ^b   Flagello, Donis ^b  

^a CADENCE DESIGN SYSTEMS   (United States)

^b ASML   (Netherlands)

Author keywords

Double exposure lithography; Double patterning technology; DPT; Effective k 1<0.2; Hyper NA; Image decomposition; Strong RET

Indexed keywords

AUTOMATIC PITCH DECOMPOSITION; DOUBLE EXPOSURE LITHOGRAPHY; DOUBLE PATTERNING TECHNOLOGY (DPT); IMAGE DECOMPOSITION;

COMPUTER SIMULATION; CONSTRAINT THEORY; DECOMPOSITION; FLASH MEMORY; IMAGE ANALYSIS; LITHOGRAPHY; OPTICAL DEVICES; SILICON WAFERS;

INTEGRATED CIRCUIT LAYOUT;

EID: 33846635056     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.687747     Document Type: Conference Paper

References (4)

1. M. Maenhoudt, J. Versluijs, H. Struyf, J. Van Olmen, M. Van Hove, "Double Patterning scheme for sub-0.25 kl single damascene structures at NA=0.75, λ=193nm" SPIE Optical Lithography Proceedings 2005, vol 5751
2. 1eff<0.20", Photomask Japan 2006 paper[6283-102]
3. J. C. Park, S. D. Hsu, D. J. Van Den Broeke, J. F. Chen, ASML MaskTools Inc., "Application challenges with double patterning technology (DPT) beyond 45-nm node" BACUS/SPIE 2006 [6349-75]
4. M. Dusa, A. Engelen, J. Finders "An integrated lithography concept with application on 45nm 1/2 pitch flash memory devices", SPIE-2006