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Volumn 2005-January, Issue , 2005, Pages 242-248

Providing information from the environment for growing electronic circuits through polymorphic gates

Author keywords

development; digital circuits design; genetic algorithm; polymorphic circuit

Indexed keywords

CIRCUIT SIMULATION; TIMING CIRCUITS;

EID: 33845577058     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1102256.1102313     Document Type: Conference Paper
Times cited : (12)

References (22)
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    • Gordon, T.G.W.1
  • 4
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    • Atr's artificial brain (Cam-Brain) project: A sample of what individual \codi-1 bit" model evolved neural net modules can do with digital and analog i/o
    • IEEE Computer Society Press
    • H. de Garis et al. Atr's artificial brain (Cam-Brain) project: A sample of what individual \codi-1 bit" model evolved neural net modules can do with digital and analog i/o. In Proc. of the 1st NASA/DoD Workshop on Evolvable Hardware, pp. 102-110. IEEE Computer Society Press, 1999.
    • (1999) Proc. of the 1st NASA/DoD Workshop on Evolvable Hardware , pp. 102-110
    • De Garis, H.1
  • 6
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    • Finding general solutions to the parity problem by evolving machine-language representations
    • San Francisco, CA,. Morgan Kaufmann
    • L. Huelsbergen. Finding general solutions to the parity problem by evolving machine-language representations. In Proc. of the Genetic Programming 1998 Conference, pages 158-166, San Francisco, CA, 1998. Morgan Kaufmann.
    • (1998) Proc. of the Genetic Programming 1998 Conference , pp. 158-166
    • Huelsbergen, L.1
  • 10
    • 84901411201 scopus 로고    scopus 로고
    • The PIG Paradigm: The Design and Use of a Massively Parallel Fine Grained Self-Reconfigurable Infinitely Scalable Architecture
    • ed by Stoica, A. et al., Pasadena, CA, USA, 1999 IEEE Computer Society, Los Alamitos
    • N. Macias. The PIG Paradigm: The Design and Use of a Massively Parallel Fine Grained Self-Reconfigurable Infinitely Scalable Architecture. In EH'99: Proc. of the 1st NASA/DoD Workshop on Evolvable Hardware, ed by Stoica, A. et al., Pasadena, CA, USA, 1999 (IEEE Computer Society, Los Alamitos 1999) pp. 175-180
    • (1999) EH'99: Proc. of the 1st NASA/DoD Workshop on Evolvable Hardware , pp. 175-180
    • MacIas, N.1
  • 11
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    • D. Mange et al. Towards robust integrated circuits: The embryonics approach. Proc. of IEEE. Vol. 88, No. 4, 2000, pp. 516-541
    • (2000) Proc. of IEEE. , vol.88 , Issue.4 , pp. 516-541
    • Mange, D.1
  • 15
  • 16
    • 27944501115 scopus 로고    scopus 로고
    • Evolutionary Design of Arbitrarily Large Sorting Networks Using Development
    • to appear
    • L. Sekanina and M. Bidlo. Evolutionary Design of Arbitrarily Large Sorting Networks Using Development. Genetic Programming and Evolvable Machines. Vol. 6, 2005 (to appear)
    • (2005) Genetic Programming and Evolvable Machines , vol.6
    • Sekanina, L.1    Bidlo, M.2
  • 17
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    • Taking Evolutionary Circuit Design From Experimentation to Implementation: Some Useful Techniques and a Silicon Demonstration
    • A. Stoica et al. Taking Evolutionary Circuit Design From Experimentation to Implementation: Some Useful Techniques and a Silicon Demonstration. IEE Proc.-Comp. Digit. Tech. Vol. 151, No. 4, 2004, pp. 295-300
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  • 21
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    • Explorations in design space: Unconventional electronics design through artificial evolution
    • A. Thompson and P. Layzell and R. Zebulum. Explorations in design space: Unconventional electronics design through artificial evolution. IEEE Trans. on Evolutionary Computation. Vol. 3, No. 3, 1999, pp. 167-196
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    • Thompson, A.1    Layzell, P.2    Zebulum, R.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.