An FPGA-based verification framework for real-time vision systems

Proceedings of the IEEE Computer Society Conference on Computer Vision and Pattern Recognition

Volumn 2006, Issue , 2006, Pages 124-132

  Van Der Wal, Gooitzen ^a   Brehm, Frederic ^a   Piacentino, Michael ^a   Marakowitz, James ^a   Gudis, Eduardo ^a   Sufi, Azhar ^a   Montante, James ^a  

^a SARNOFF CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; COMPUTER VISION; ERROR ANALYSIS; REAL TIME SYSTEMS; SYSTEMS ANALYSIS;

MULTIPLE VISION ALGORITHMS; SOFTWARE VERIFICATION; SYSTEM ON A CHIP (SOC);

FIELD PROGRAMMABLE GATE ARRAYS;

EID: 33845529451     PISSN: 10636919     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CVPRW.2006.27     Document Type: Conference Paper

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