Expanding disparity range in an FPGA stereo system while keeping resource utilization low

Proceedings - 2005 IEEE Computer Society Conference on Computer Vision and Pattern Recognition, CVPR 2005

Volumn 2005-January, Issue , 2005, Pages

  Masrani, Divyang K ^a   MacLean, W James ^a  

^a UNIVERSITY OF TORONTO   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; COMPUTER VISION; STEREO IMAGE PROCESSING;

COMPUTER VISION ALGORITHMS; FPGA ARCHITECTURES; HARDWARE/SOFTWARE SYSTEMS; PROPOSED ARCHITECTURES; RECONFIGURABLE DEVICES; RESOURCE REQUIREMENTS; RESOURCE UTILIZATIONS; SPEED IMPROVEMENT;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 38049007526     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/cvpr.2005.455     Document Type: Conference Paper

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