An ILP formulation for task scheduling on heterogeneous chip multiprocessors

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 4263 LNCS, Issue , 2006, Pages 267-276

  Tosun, Suleyman ^a   Mansouri, Nazanin ^b   Kandemir, Mahmut ^c   Ozturk, Ozcan ^c  

^a SELCUK UNIVERSITY   (Turkey)

^b SYRACUSE UNIVERSITY   (United States)

^c The Pennsylvania State University   (United States)

Author keywords

Duplication; DVS; Energy minimization; Heterogeneous chip multiprocessors; Reliability

Indexed keywords

COMPUTER ARCHITECTURE; CONFORMAL MAPPING; CONSTRAINT THEORY; GRAPH THEORY; INTEGER PROGRAMMING; RELIABILITY; SCHEDULING;

DUPLICATION; DYNAMIC VOLTAGE SCALING (DVS); ENERGY MINIMIZATION; HETEROGENEOUS CHIP MULTIPROCESSORS;

MULTIPROCESSING SYSTEMS;

EID: 33845241669     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/11902140_30     Document Type: Conference Paper

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