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Volumn , Issue , 2005, Pages 15-20

Flash memory built-in self-diagnosis with test mode control

Author keywords

[No Author keywords available]

Indexed keywords

AREA OVERHEAD; BUILT-IN SELF-DIAGNOSIS; FLASH MEMORY CHIP; INDUSTRIAL CHIPS; MARKET GROWTH; MEMORY TESTING; MODE CONTROL; PRODUCTION YIELD;

EID: 33751075352     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VTS.2005.45     Document Type: Conference Paper
Times cited : (6)

References (11)
  • 1
    • 33748371973 scopus 로고    scopus 로고
    • IEEE 1005 standard definitions and characterization of floating gate semiconductor arrays
    • IEEE, Piscataway
    • IEEE, IEEE 1005 Standard Definitions and Characterization of Floating Gate Semiconductor Arrays, IEEE Standards Department, Piscataway, 1999.
    • (1999) IEEE Standards Department
  • 5
  • 7
    • 0242359074 scopus 로고    scopus 로고
    • RAMSES-FT: A fault simulator for flash memory testing and diagnostics
    • Monterey, California, Apr
    • K.-L. Cheng, J.-C. Yeh, C.-W. Wang, C.-T. Huang, and C.-W. Wu, "RAMSES-FT: A fault simulator for flash memory testing and diagnostics", in Proc. IEEE VLSI Test Symp. (VTS),Monterey, California, Apr. 2002, pp. 281-286.
    • (2002) Proc. IEEE VLSI Test Symp. (VTS) , pp. 281-286
    • Cheng, K.-L.1    Yeh, J.-C.2    Wang, C.-W.3    Huang, C.-T.4    Wu, C.-W.5
  • 9
    • 0034995342 scopus 로고    scopus 로고
    • Flash memory disturbances: Modeling and test
    • Marina Del Rey, California, Apr
    • M. G. Mohammad and K. K. Saluja, "Flash memory disturbances: modeling and test", in Proc. IEEE VLSI Test Symp. (VTS), Marina Del Rey, California, Apr. 2001, pp. 218-224.
    • (2001) Proc. IEEE VLSI Test Symp. (VTS) , pp. 218-224
    • Mohammad, M.G.1    Saluja, K.K.2
  • 10
    • 13244286069 scopus 로고    scopus 로고
    • Electrical model for program disturb faults in non-volatile memories
    • New Delhi, India, Jan
    • M. G. Mohammad and K. K. Saluja, "Electrical model for program disturb faults in non-volatile memories", in Proc. 16th Int. Conf. VLSI Design, New Delhi, India, Jan. 2003, pp. 217-222.
    • (2003) Proc. 16th Int. Conf. VLSI Design , pp. 217-222
    • Mohammad, M.G.1    Saluja, K.K.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.