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Volumn , Issue , 1981, Pages 347-354
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Automatic test generation for stuck-open faults in CKOS VLSI
a |
Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTER AIDED DESIGN;
METALS;
MOS DEVICES;
OXIDE SEMICONDUCTORS;
VLSI CIRCUITS;
AUTOMATIC TEST GENERATION;
CMOS (COMPLEMENTARY METAL OXIDE SEMICONDUCTOR);
CONVENTIONAL TESTING;
LOW-POWER DISSIPATION;
STEP-BY-STEP ALGORITHM;
STUCK-OPEN FAULTS;
TEST GENERATIONS;
TEST PATTERN GENERATIONS;
CMOS INTEGRATED CIRCUITS;
INTEGRATED CIRCUIT TESTING;
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EID: 33751072538
PISSN: 0738100X
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (37)
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References (9)
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