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Volumn , Issue , 1980, Pages 378-381
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VLSI - THE INADEQUACY OF THE STUCK AT FAULT MODEL.
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NONE
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Author keywords
[No Author keywords available]
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Indexed keywords
INTEGRATED CIRCUIT TESTING;
LOGIC CIRCUITS;
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EID: 0019189885
PISSN: 01415425
EISSN: None
Source Type: Journal
DOI: None Document Type: Conference Paper |
Times cited : (16)
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References (0)
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