Using NEXUS compliant debuggers for real time fault injection on microprocessors

SBCCI 2006 - 19th Symposium on Integrated Circuits and Systems Design

Volumn 2006, Issue , 2006, Pages 214-219

  Fidalgo, André ^a   Gericota, Manuel ^a   Alves, Gustavo ^a   Ferreira, José ^b  

^a INSTITUTO SUPERIOR DE ENGENHARIA DO PORTO   (Portugal)

^b UNIVERSITY OF PORTO   (Portugal)

Author keywords

Fault injection; On chip debug; Real time systems

Indexed keywords

COMPUTATIONAL COMPLEXITY; COMPUTATIONAL METHODS; COMPUTER AIDED DESIGN; FAULT TOLERANT COMPUTER SYSTEMS; PROGRAM DEBUGGING; REAL TIME SYSTEMS;

ELECTRONIC DEVICES; FAULT INJECTION; MEMORY ELEMENTS; ON CHIP DEBUG;

MICROPROCESSOR CHIPS;

EID: 33750908234     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1150343.1150397     Document Type: Conference Paper

References (17)

1. "Coping with SEUs/SETs in microprocessors by means of low-cost solutions: A comparison study"; M. Rebaudengo, M. S. Reorda, M. Violante, B. Nicolescu, R. Velazco; IEEE Transactions on Nuclear Science, Vol 49, No 3; June 2002.
2. "Basic concepts and taxonomy of dependable and secure computing"; A. Avizienis, J.C. Laprie, B. Randell, C. Landwehr; IEEE Transactions on Dependable and Secure Computing, Volume 1, Issue 1; Jan 2004.
3. "Comparison and application of different VHDL-based fault injection techniques"; J. Gracia, J.C. Baraza, D. Gil, P.J. Gil; IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems; San Francisco, USA; Oct 2001.
4. "Experimental evaluation of a COTS system for space applications"; H. Madeira, R. R. Some, F. Moreira, D. Costa, D. Rennels; International Conference on Dependable Systems and Networks; Bethesda, USA; June 2002.
5. "Experimental Validation of High-Speed Fault-Tolerant Systems Using Physical Fault Injection"; R. J. Martínez, P. J. Gil, G. Martín, C. Pérez, J. J. Serrano; Seventh IFIP Working Conf. Dependable Computing for Critical Applications: DCCA-7; San Jose, USA; Jan. 1999.
6. "Evaluation of the Thor Microprocessor Using Scan-chain-Based and Simulation Based Fault-Injection"; P. Folkesson, S. Svensson, J. Karlsson; 8th European Workshop on Dependable Computing (EWDC-8); Goteborg, Sweden; April 1997.
7. "A Technique for Automated Validation of Fault Tolerant Designs Using Laser Fault Injection (LFI)"; J. R. Samson, W. A. Moreno, F. J. Falquez; 28th Annual International Symposium on Fault-Tolerant Computing; Munich, Germany; June 1998.
8. "Comparison of physical and software-implemented fault injection techniques"; J. Arial, Y. Crouzet, J. Karlsson, P. Folkesson, E. Fuchs, G. H. Leber, IEEE Transactions on Computers, Volume 52, Issue 9; Sept. 2003.
9. "The Nexus 5001 Forum Standard for a Global Embedded Processor Interface version 2.0"; IEEE-ISTO 5001; 2003.
10. "INERTE: Integrated NExus-Based Real-Time Fault Injection Tool for Embedded Systems"; P. Yuste, D. de Andrés, L. Lemus, J. J. Serrano, P. J. Gil; The International Conference on Dependable Systems and Networks; San Francisco, USA; June 2003.
11. www.fireescale.com
12. www.isystem.com/Products/Emulators/iC3000/
13. Giovanni Ferrante, "CPUGEN 2.00", 2003.
14. www.opencores.org
15. "How to characterize the problem of SEU in processors & representative errors observed on flight"; R. Velazco, R. Ecoffet, F. Faure; 11th IEEE International On-Line Testing Symposium; Saint Raphael, France; July 2005.
16. "A Modified Debugging Infrastructure to Assist Real Time Fault Injection Campaigns"; A. Fidalgo, G. Alves, J. Ferreira; 9th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (in press); Prague, Czech Republic; April 2006.
17. www.xilinx.com