Optimized tolerance design of feedback compensation networks for voltage regulators

IEEE International Symposium on Industrial Electronics

Volumn 4, Issue , 2002, Pages 1103-1107

  Femia, N ^a   Spagnnolo, G ^a   Vitelir, M ^b  

^a UNIVERSITY OF SALERNO   (Italy)

^b SECOND UNIVERSITY OF NAPLES   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

FEEDBACK; FITS AND TOLERANCES; INDUSTRIAL ELECTRONICS; OPTIMIZATION; VOLTAGE REGULATORS;

CONNECTED REGION; DESIGN PROBLEMS; DIVIDE-AND-CONQUER ALGORITHM; FEEDBACK COMPENSATION; INTERVAL ARITHMETIC; OPTIMIZATION DESIGN; TOLERANCE DESIGN; TOLERANCE REGIONS;

DC-DC CONVERTERS;

EID: 33750034000     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/isie.2002.1025942     Document Type: Conference Paper

References (8)

1. R.Spence, R.S.Soin: Tolerance design of electronic circuits, Addison Wesley Publishing Company, 1988.
2. G:Spagnuolo: "An. interval, arithmetic-based yield evaluation in circuit tolerance design", Accepted for IEEE ISCAS 2002, Phoenix, U.S.A., June 2002.
3. J.Wojciechowski, J.Vlach: "Ellipsoidal method for design centering and yield estimation", IEEE Trans. On CAD, Vol.12, No.10, Oct. 1993, pp.1570-1579.
4. R.E.Moore, Interval Analysis, Prentice Hall, Englewood Cliffs, NJ, 1996.
5. L.Jaulin et al.: Applied Internal Analysis, Springer, 2001.
6. G.Spagnuolo, M.Vitelli: "Worst-case tolerance design by genetic algorithms", Proc. of 2002 IEEE ISIE, L'Aquila.
7. N.Femia et Al.:"Selection criteria of closed-loop controllers for dc-dc voltage regulators based on nominal and tolerance design: Monte-Carlo & Interval Arithmetic based optimization", Proc. of 2002 IEEE ISIE, L'Aquila.
8. N.Femia et Al.:"Selection criteria of closed-loop controllers for dc-dc voltage regulators based on nominal and tolerance design: Genetic Algorithms & Vertex Analysis based optimization", Proc. of 2002 IEEE ISIE, L'Aquila.