An interval arithmetic-based yield evaluation in circuit tolerance design

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 1, Issue , 2002, Pages

  Spagnuolo, G ^a  

^a UNIVERSITY OF SALERNO   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; COMPUTER SIMULATION; CONSTRAINT THEORY; DIGITAL ARITHMETIC; INTEGRATED CIRCUIT LAYOUT; MONTE CARLO METHODS; OPTIMIZATION;

CIRCUIT TOLERANCE; DIVIDE-AND-CONQUER ALGORITHM; INTERVAL ARITHMETIC;

INTEGRATED CIRCUIT TESTING;

EID: 0036296911     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

1. Acceptability regions of a class of linear networks
2. Ellipsoidal method for design centering and yield estimation
3. Statistical exploration approach to design centering
4. Cost reduction of Monte Carlo yield estimates
5. Tolerance design of dc-dc switching regulators