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Volumn 1, Issue , 1998, Pages 115-122

Automated synthesis of interleaved memory systems for custom computing machines

Author keywords

[No Author keywords available]

Indexed keywords

HARDWARE; INTERCONNECTION NETWORKS (CIRCUIT SWITCHING);

EID: 33749938915     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EURMIC.1998.711785     Document Type: Conference Paper
Times cited : (4)

References (23)
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    • Sohi-G.S., "High-bandwidth interleaved memories for vector processors - a simulation study," IEEE-Trans.-on-Computers. Vol.42, No.l; Jan. 1993; pp.34-44.
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    • Sohi, G.S.1
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    • March
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  • 10
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    • Wijshoff-HAG; van-Leeuwen-J, "The Structare Of Periodic Storage Schemes For Parallel Memories," lEEE-Trans.-on-Computers. Vol.C-34, No.6; June 1985; pp.501-505.
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    • F.Balasa , F.Cathoor and H.De Man, Background Me-meory Area Estimation for Multi-dimensional Signal Processing Systems, IEEE Trans, on CAD, , Vol 14 , 1995.
    • (1995) IEEE Trans, on CAD , vol.14
    • Balasa, F.1    Cathoor, F.2    De Man, H.3
  • 13
    • 0029475549 scopus 로고
    • A memory selection algorithm for high-performance pipelines
    • Bakshi-S; Gajski-DD S. , "A Memory Selection Algorithm for High-Performance Pipelines", Proceedings EURO-DAC'95, 1995, pp. 124-129.
    • (1995) Proceedings EURO-DAC'95 , pp. 124-129
    • Bakshi, S.1    Gajski, D.D.S.2
  • 14
    • 0028728521 scopus 로고
    • A new technique for exploiting regularity in data path synthesis
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.