Test structures for the characterisation of MEMS and CMOS integration technology

IEEE International Conference on Microelectronic Test Structures

Volumn 2006, Issue , 2006, Pages 143-148

  Lin, H ^a   Walton, A J ^a   Dunare, C C ^a   Stevenson, J T M ^a   Gundlach, A M ^a   Smith, S ^a   Bunting, A S ^a  

^a UNIVERSITY OF EDINBURGH   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

CHAIN STRUCTURES; KELVIN TEST STRUCTURES; TEMPERATURE BONDING; WAFER THINNING;

CMOS INTEGRATED CIRCUITS; ELECTRIC CONNECTORS; ELECTRONIC EQUIPMENT TESTING; INTEGRATED CIRCUIT LAYOUT; SILICON WAFERS; WSI CIRCUITS;

MICROELECTROMECHANICAL DEVICES;

EID: 33749536255     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICMTS.2006.1614292     Document Type: Conference Paper

References (6)

1. J. H. Smith, S. Montague, J. J. Sniegowski, J. R. Murray, and P. J. McWhorter, "Embedded micromechanical devices for the monolithic integration of MEMS with CMOS", IEDM Technical Digest, pp. 609-612, 1995.
2. H. Baltes, O. Brand, A. Hierlemann, D. Lange, and C. Hagleitner, "CMOS MEMS - present and future", Technical Digest, Fifteenth IEEE International Conference on Micro Electro Mechanical Systems, pp. 459-466, 2002.
3. D. F. Guillou, S. Santhanam and L. R. Carley, "Laminated, sacrificial-poly MEMS technology in standard CMOS", Sensors and Actuators A (Physical), 85, pp. 346-355, 2000.
4. th European Workshop on MicroMechanics, pp. 207-210, 2005.
5. B. Stine, D. Ouma, R. Divecha, D. Boning, J. Chung, "Rapid Characterization and Modeling of Pattern Dependent Variation in Chemical Mechanical Polishing", IEEE Transaction Semiconductor Manufacturing, 11, no. 1, pp. 129-140, 1998.
6. Q. Y. Tong, U. Gösele, Semiconductor Wafer Bonding: Science and Technology, New York, Wiley, 1998.