Direct digital synthesizer with sine-weighted DAC at 32-GHz clock frequency in InP DHBT technology

IEEE Journal of Solid-State Circuits

Volumn 41, Issue 10, 2006, Pages 2284-2290

  Turner, Steven Eugene ^a,b   Kotecki, David E ^a,b  

^a IEEE   (United States)

^b University of Maine   (United States)

Author keywords

Accumulator; Digital to analog converter (DAC); Direct digital synthesizer (DDS); Emitter coupled logic (ECL); Heterojunction bipolar transistor (HBT); High speed integrated circuits; Indium phosphide (InP)

Indexed keywords

ACCUMULATORS; DIRECT DIGITAL SYNTHESIZER (DDS); DOUBLE HETEROJUNCTION BIPOLAR TRANSISTOR (DHBT); EMITTER COUPLED LOGIC (ECL); HIGH SPEED INTEGRATED CIRCUITS; SPURIOUS FREE DYNAMIC RANGE (SFDR);

DIGITAL DEVICES; DIGITAL TO ANALOG CONVERSION; ELECTRIC FREQUENCY CONTROL; EMITTER COUPLED LOGIC CIRCUITS; ENERGY UTILIZATION; ROM; SEMICONDUCTING INDIUM PHOSPHIDE;

HETEROJUNCTION BIPOLAR TRANSISTORS;

EID: 33749506451     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2006.881552     Document Type: Conference Paper

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