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Volumn 16, Issue 5, 2006, Pages 296-298

Direct digital synthesizer with ROM-less architecture at 13-GHz clock frequency in InP DHBT technology

Author keywords

Accumulator; Digital to analog converter (DAC); Direct digital synthesizer (DDS); Heterojunction bipolar transistor (HBT); High speed integrated circuits (ICs); Indium phosphide (InP)

Indexed keywords

DIRECT DIGITAL SYNTHESIZER (DDS); HIGH-SPEED INTEGRATED CIRCUITS (IC); SPURIOUS FREE DYNAMIC RANGE (SFDR);

EID: 33646400609     PISSN: 15311309     EISSN: None     Source Type: Journal    
DOI: 10.1109/LMWC.2006.873490     Document Type: Article
Times cited : (37)

References (6)
  • 4
    • 30944432147 scopus 로고    scopus 로고
    • Direct digital synthesis for enabling next generation RF systems
    • Nov.
    • K. R. Elliott, "Direct digital synthesis for enabling next generation RF systems," in CSIC Dig., Nov. 2005, pp. 125-128.
    • (2005) CSIC Dig , pp. 125-128
    • Elliott, K.R.1
  • 5
    • 15844379193 scopus 로고    scopus 로고
    • 4-bit adder-accumulator at 41-GHz clock frequency in InP DHBT technology
    • Mar.
    • S. E. Turner, R. B. Elder, Jr., D. S. Jansen, and D. E. Kotecki, "4-bit adder-accumulator at 41-GHz clock frequency in InP DHBT technology," IEEE Microw. Wireless Compon. Lett., vol. 15, no. 3, pp. 144-146, Mar. 2005.
    • (2005) IEEE Microw. Wireless Compon. Lett. , vol.15 , Issue.3 , pp. 144-146
    • Turner, S.E.1    Elder Jr., R.B.2    Jansen, D.S.3    Kotecki, D.E.4
  • 6
    • 24144433001 scopus 로고    scopus 로고
    • Benchmark results for high-speed 4-bit accumulators implemented in indium phosphide DHBT technology
    • Aug.
    • S. E. Turner and D. E. Kotecki, "Benchmark results for high-speed 4-bit accumulators implemented in indium phosphide DHBT technology," Int. J. High Speed Electron. Devices, vol. 14, no. 3, pp. 646-651, Aug. 2004.
    • (2004) Int. J. High Speed Electron. Devices , vol.14 , Issue.3 , pp. 646-651
    • Turner, S.E.1    Kotecki, D.E.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.