Single event effects testing of a PLL and LVDS in a RadHard-By-design 0.25 micron ASIC

IEEE Radiation Effects Data Workshop

Volumn , Issue , 2005, Pages 98-101

  Hartwell, Mary ^a   Hafer, Craig ^a   Milliken, Peter ^a   Farris, Teresa ^a  

^a Gaisler Research   (United Kingdom)

Author keywords

0.25 m; ASIC; RadHard by Design; Single Event Effects (SEE); Single Event Latchup (SEL)

Indexed keywords

SINGLE EVENT EFFECTS (SEE); SINGLE EVENT LATCHUP (SEL);

EQUIPMENT TESTING; FLIP FLOP CIRCUITS; NATURAL FREQUENCIES; PHASE LOCKED LOOPS; PHASE SHIFT; RADIATION HARDENING;

APPLICATION SPECIFIC INTEGRATED CIRCUITS;

EID: 33749385860     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/REDW.2005.1532673     Document Type: Conference Paper

References (5)

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2. D.B. Kerwin, J.M. Benedetto, "Radiation Hardening Of Submicron CMOS Wafers From Commercial Foundries", GOMAC Digest of Papers, in Arlington, Virginia, March 16, 1998, pp. 109 - 112.
3. D.B. Kerwin and J.M. Benedetto, "Total Dose And Single Event Effects Testing Of UTMC Commercial RadhardTM Gate Arrays", IEEE Radiation Effects Data Workshop, in Newport Beach, California, July 24, 1998, pp. 80-85.
4. J.M. Benedetto, D.B. Kerwin, "Total Dose Hardening Of Deep SubMicron Process for Mixed-Signal Applications", GOMAC Digest of Papers, 2001, pp. 539-542.
5. C. Hafer, V. Schnathorst, J. Pfeil, T. Meade, "A RadHard-by-Design Clock Generator", IEEE Aerospace Conference, 2005, 27-0904.